Abstract: The IC test system provides a system and method for thermal management of test pins. A test pin array (22) in a pin guide (24) is mounted in a retainer (20) which is located between an IC wafer (12) which contains IC devices to be tested (DUT) and a load board (40) which provides pathways to test signals to the DUT. On the other side of the load board is a contact plate (50) which together with the retainer straddles the load board. Leg extensions (36) pass through the load board apertures (42) and provide a thermal circuit from the contact plate to the retainer and to the pin array. On the upper side of the contact plate is a cooling/heating system with a thermal electric peltier device (62) and a further heat exchanger (64) as needed. Holes (44) are provided in the legs (36) to provide a supply of dry air to the wafer and pin array to minimize condensation as a result of cooling effects.

Abstract: A method and apparatus are provided for modulating a coherent light source with a digital) signal. The method includes the steps of splitting the digital signal into a first and a second copy and mixing the first copy with a clock signal to provide a first modulation component. The method further includes the steps of inverting the second copy and delaying the clock signal by one-hundred eighty degrees. The method also includes the steps of mixing the inverted second copy with the delayed clock signal to provide a second modulation component and summing the first and second modulation components.