Patents by Inventor Harlan Stamper

Harlan Stamper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7858270
    Abstract: A method of dry developing a multi-layer mask on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying a second mask layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the second mask layer using a dry plasma etching process, wherein the dry plasma etching process comprises introducing a process gas, forming plasma from the process gas, and exposing the substrate to the plasma. During the pattern transfer, the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: December 28, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Harlan Stamper
  • Publication number: 20080292973
    Abstract: A method of dry developing a multi-layer mask on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying a second mask layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the second mask layer using a dry plasma etching process, wherein the dry plasma etching process comprises introducing a process gas, forming plasma from the process gas, and exposing the substrate to the plasma. During the pattern transfer, the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer.
    Type: Application
    Filed: May 21, 2007
    Publication date: November 27, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Harlan STAMPER
  • Publication number: 20080241763
    Abstract: A method of patterning a structure in a thin film on a substrate is described. A film stack on the substrate includes the thin film on the substrate, a developable anti-reflective coating (ARC) layer on the thin film, and a first photo-resist layer on the developable ARC layer. The first photo-resist layer and the developable ARC layer are imaged with a first image pattern and developed to form the first image pattern in the first photo-resist layer and the developable ARC layer. Thereafter, the first photo-resist layer is removed, and the developable ARC layer is modified by thermal treatment. A second photo-resist layer is then formed on the modified ARC layer, and the second photo-resist layer is imaged with a second image pattern and developed to form the second image pattern in the second photo-resist layer. The first and second image patterns are then transferred to the thin film.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Harlan Stamper, Shannon W. Dunn, Sandra Hyland