Abstract: Methods and apparatus are provided for soft data generation for memory devices using reference cells. At least one soft data value is generated in a memory device by writing a known data to one or more reference cells; reading one or more of the reference cells; obtaining a read statistic based on the read one or more reference cells; and obtaining the at least one soft data value based on the obtained read statistic. The read statistics can optionally be obtained for one or more desired locations of a memory array; or for a given pattern, PATT, in one or more aggressor cells. The read statistic can optionally comprise asymmetric statistics obtained for a plurality of possible values.

Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.

Abstract: A circuit includes an input terminal for receiving an input signal and a time stamp circuit including an input and an output. The input is coupled to the input terminal. The time stamp circuit includes a timer, and the output is for providing a time stamp based on a value of the timer in response to receiving the input signal. The circuit further includes an encoder including an input coupled to the output of the time stamp circuit and configured to encode the time stamp into a packet. The circuit also includes a transmitter configured to transmit the packet.

Abstract: Methods and apparatus are provided for soft data generation for memory devices using reference cells. At least one soft data value is generated in a memory device by writing a known data to one or more reference cells; reading one or more of the reference cells; obtaining a read statistic based on the read one or more reference cells; and obtaining the at least one soft data value based on the obtained read statistic. The read statistics can optionally be obtained for one or more desired locations of a memory array; or for a given pattern, PATT, in one or more aggressor cells. The read statistic can optionally comprise asymmetric statistics obtained for a plurality of possible values.

Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.

Abstract: A composite data detector having first and second data detectors. The second detector of the invention starts in a known state and only runs as long as is necessary before being switched off and handing control back over to the smaller detector. Therefore, the composite data detector of the invention consumes less power than the known composite data detector and estimates bits with higher accuracy.

Abstract: A variable gain voltage signal amplifier is provided for incorporation in an automatic gain control circuit, such as for a disk drive. The variable gain voltage signal amplifier comprises: an amplifier including an inverting input voltage signal terminal and an output voltage signal terminal. The amplifier includes an input signal path coupled to the input voltage signal terminal and further includes a feedback signal path coupling between the input voltage signal terminal and the output voltage signal terminal. The input signal path comprises a capacitor coupled in series with a resistor, and the feedback signal path comprises a resistor. At least one of the resistors comprises an electronic signal-controlled resistor.