Patents by Inventor Harold D. Goodpaster

Harold D. Goodpaster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Substrate, with ESD magnetically induced wires, bound to passives/product ICS
    Patent number: 7643259
    Abstract: A device is protected from induced or unexpected current spikes or surges, by receiving the current spikes through a conducting wire. The conducting wire is placed adjacent to a parallel conducting wire having opposing current flow. Magnetic fluxes in either conducting wire create induced currents that reduce the current in the other conducting wire.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: January 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Harold D Goodpaster
  • Magnetic techniques to address electrostatic discharge
    Publication number: 20080062601
    Abstract: A device is protected from induced or unexpected current spikes or surges, by receiving the current spikes through a conducting wire. The conducting wire is placed adjacent to a parallel conducting wire having opposing current flow. Magnetic fluxes in either conducting wire create induced currents that reduce the current in the other conducting wire.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 13, 2008
    Inventor: Harold D. Goodpaster
  • Method to fabricate a self aligned source resistor in embedded flash memory applications
    Patent number: 6348370
    Abstract: A method for fabricating a semiconductor resistor in embedded FLASH memory applications is described. In the method a gate array (9) is formed on a semiconductor substrate. Isolations regions (70) are removed and the exposed silicon implanted forming diffused regions (180). The SAS so formed can be configured to function as a resistor element (240).
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: February 19, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Freidoon Mehrad, Harold D. Goodpaster, Anand Seshadri
  • DECL logic gates which operate with a 3.3 volt supply or less
    Patent number: 5424660
    Abstract: A differential emitter coupled logic circuit having an output and a compliment of the output, the circuit comprising: a first emitter coupled transistor pair (Q17 and Q18); a second emitter coupled transistor pair (Q19 and Q20); a third emitter coupled transistor pair (Q25 and Q26); a fourth emitter coupled transistor pair (Q33 and Q34); a filch emitter coupled transistor pair (Q37 and Q38); and a sixth emitter coupled transistor pair (Q35 and Q36).
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: June 13, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: David B. Scott, Harold D. Goodpaster