Abstract: A method and apparatus for controlling the thickness of a semiconductor wafer during a backside grinding process are disclosed. The present invention uses optical measurement of the wafer thickness during a backside grinding process to determine the endpoint of the grinding process. Preferred methods entail measuring light transmitted through or reflected by a semiconductor wafer as a function of angle of incidence or of wavelength. This information is then used, through the use of curve fitting techniques or formulas, to determine the thickness of the semiconductor wafer. Furthermore, the present invention may be used to determine if wedging of the semiconductor occurs and, if wedging does occur, to provide leveling information to the thinning apparatus such that a grinding surface can be adjusted to reduce or eliminate wedging.

Abstract: The present invention provides a method of forming an integrated semiconductor device, and the device so formed. An active surface of at least two semiconductor devices, such as semiconductor chips, are temporarily mounted onto an alignment substrate. A support substrate is affixed to a back surface of the devices using a conformable bonding material, wherein the bonding material accommodates devices having different dimensions. The alignment substrate is then removed leaving the devices wherein the active surface of the devices are co-planar.

Abstract: A method and apparatus for controlling the thickness of a semiconductor wafer during a backside grinding process are disclosed. The present invention uses optical measurement of the wafer thickness during a backside grinding process to determine the endpoint of the grinding process. Preferred methods entail measuring light transmitted through or reflected by a semiconductor wafer as a function of angle of incidence or of wavelength. This information is then used, through the use of curve fitting techniques or formulas, to determine the thickness of the semiconductor wafer. Furthermore, the present invention may be used to determine if wedging of the semiconductor occurs and, if wedging does occur, to provide leveling information to the thinning apparatus such that a grinding surface can be adjusted to reduce or eliminate wedging.

Abstract: The present invention provides a method of forming an integrated semiconductor device, and the device so formed. An active surface of at least two semiconductor devices, such as semiconductor chips, are temporarily mounted onto an alignment substrate. A support substrate is affixed to a back surface of the devices using a conformable bonding material, wherein the bonding material accommodates devices having different dimensions. The alignment substrate is then removed leaving the devices wherein the active surface of the devices are co-planar.

Abstract: The present invention provides a method of forming an integrated semiconductor device, and the device so formed. An active surface of at least two semiconductor devices, such as semiconductor chips, are temporarily mounted onto an alignment substrate. A support substrate is affixed to a back surface of the devices using a conformable bonding material, wherein the bonding material accommodates devices having different dimensions. The alignment substrate is then removed leaving the devices wherein the active surface of the devices are co-planar.

Abstract: A method for developing copolymer photosensitive resists wherein a single solvent is used in conjunction with a puddle develop tool. The copolymer resist is ZEP 7000 and the developer is ethyl 3-ethoxy propionate (EEP).

Abstract: A method and apparatus for controlling the thickness of a semiconductor wafer during a backside grinding process are disclosed. The present invention uses optical measurement of the wafer thickness during a backside grinding process to determine the endpoint of the grinding process. Preferred methods entail measuring light transmitted through or reflected by a semiconductor wafer as a function of angle of incidence or of wavelength. This information is then used, through the use of curve fitting techniques or formulas, to determine the thickness of the semiconductor wafer. Furthermore, the present invention may be used to determine if wedging of the semiconductor occurs and, if wedging does occur, to provide leveling information to the thinning apparatus such that a grinding surface can be adjusted to reduce or eliminate wedging.

Abstract: A method and apparatus for controlling the thickness of a semiconductor wafer during a backside grinding process are disclosed. The present invention uses optical measurement of the wafer thickness during a backside grinding process to determine the endpoint of the grinding process. Preferred methods entail measuring light transmitted through or reflected by a semiconductor wafer as a function of angle of incidence or of wavelength. This information is then used, through the use of curve fitting techniques or formulas, to determine the thickness of the semiconductor wafer. Furthermore, the present invention may be used to determine if wedging of the semiconductor occurs and, if wedging does occur, to provide leveling information to the thinning apparatus such that a grinding surface can be adjusted to reduce or eliminate wedging.

Abstract: Non-aqueous cleaning compositions capable of removing cured polyimides and other polymers from a metal circuitry containing substrate such as a semiconductor device for rework and other purposes without any significant adverse affect on the circuitry are provided consisting essentially of alkanolamines, preferably monoethanolamine or monoethanolamine-diethanolamine mixtures and optionally with a solvent such as NMP in an amount less than about 50% by weight. A method is also provided for removing polyimide coatings and other polymers from semiconductor devices using the cleaning compositions of the invention.

Abstract: A method for developing copolymer photosensitive resists wherein a single solvent is used in conjunction with a puddle develop tool. The copolymer resist is ZEP 7000 and the developer is ethyl 3-ethoxy propionate (EEP).

Abstract: A method for developing copolymer photosensitive resists wherein a single solvent is used in conjunction with a puddle develop tool. The copolymer resist is ZEP 7000 and the developer is ethyl 3-ethoxy propionate (EEP).

Abstract: Non-aqueous cleaning compositions capable of removing cured polyimides and other polymers from a metal circuitry containing substrate such as a semiconductor device for rework and other purposes without any significant adverse affect on the circuitry are provided consisting essentially of alkanolamines, preferably monoethanolamine or monoethanolamine-diethanolamine mixtures and optionally with a solvent such as NMP in an amount less than about 50% by weight. A method is also provided for removing polyimide coatings and other polymers from semiconductor devices using the cleaning compositions of the invention.

Abstract: Disclosed is a method and apparatus for polishing a semiconductor wafer. This invention describes a novel in situ method for eliminating residual slurry and slurry abrasive particles on the wafer. A reactant is added to the slurry during the end of the Chemical Mechanical Polish (CMP) process to dissolve the slurry and etch the abrasive particles.

Abstract: A composition of matter comprising a polyamic acid/ester having an amide pendant group directly substituting an acid site of the polyamic acid is provided, which composition when cured provides a colored polymer film when the amide group is a chromophore. The resulting polymer which may be applied as a film to semiconductor chips to provide an optically sensitive semiconductor chip comprises a partially imidized polyamic acid wherein an amide pendant group is directly attached to one acid moiety of the polyamic acid and the other acid group imidized with the adjacent amino group of the polyamic acid. The polymers are useful as optical filters on semiconductor chips and for photoresist applications.

Abstract: The present invention relates to wear-through detection in multilayered parts. This invention specifically encompasses, in one aspect, wear-through detection in semiconductor vacuum processing systems in which a wear indicator that will release a detectable constituent upon exposure to processing conditions is used inside the semiconductor vacuum processing tool. This invention permits real time detection of wear during operation of semiconductor vacuum processing equipment.

Abstract: Disclosed is a method and apparatus for polishing a semiconductor wafer. This invention describes a novel in situ method for eliminating residual slurry and slurry abrasive particles on the wafer. A reactant is added to the slurry during the end of the Chemical Mechanical Polish (CMP) process to dissolve the slurry and etch the abrasive particles.

Abstract: N,N' disubstituted perylene diamide, useful in the fabrication of semiconductor devices, which exhibit good planarity and gap-fill characteristics, the cured composites of which are capable of withstanding temperatures in excess of 500.degree. C.

Abstract: Methods and compositions for the selective etching of silicon in the presence of p-doped silicon are disclosed whereby a portion of a silicon surface may be dissolved while a p-doped pattern in the surface remains substantially undissolved. The compositions comprise (a) an aqueous solution of an alkali metal hydroxide or a tetraalkylammonium hydroxide; and (b) a high flash point alcohol, phenol, polymeric alcohol, or polymeric phenol.

Abstract: A process is disclosed for making circuit elements by photolithography comprising depositing an antireflective polyimide or polyimide precursor layer on a substrate and heating the substrate at 200.degree. C. to 500.degree. to provide a functional integrated circuit element that includes an antireflective polyimide layer. The antireflective polyimide layer contains a sufficient concentration of at least one chromophore to give rise to an absorbance sufficient to attenuate actinic radiation at 405 or 436 nm. Preferred chromophores include those arising from perylenes, naphthalenes and anthraquinones. The chromophore may reside in a dye which is a component of the polyimide coating mixture or it may reside in a residue which is incorporated into the polyimide itself.

Abstract: A process is disclosed for making circuit elements by photolithography comprising depositing an antireflective polyimide or polyimide precursor layer on a substrate and heating the substrate at 200.degree. C. to 500.degree. to provide a functional integrated circuit element that includes an antireflective polyimide layer. The antireflective polyimide layer contains a sufficient concentration of at least one chromophore to give rise to an absorbance sufficient to attenuate actinic radiation at 405 or 436 nm. Preferred chromophores include those arising from perylenes, naphthalenes and anthraquinones. The chromophore may reside in a dye which is a component of the polyimide coating mixture or it may reside in a residue which is incorporated into the polyimide itself.