Patents by Inventor Harold M. Kutz
Harold M. Kutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10762019Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.Type: GrantFiled: July 11, 2017Date of Patent: September 1, 2020Assignee: Cypress Semiconductor CorporationInventors: Timothy John Williams, David G. Wright, Harold M. Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings
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Publication number: 20190227818Abstract: A device includes an analog block array, a first analog bus segment coupled to the analog block array, a second analog bus segment coupled to the analog block array, and a third analog bus segment coupled to the analog block array. The device also includes a first I/O pin selectively couplable to the first analog bus segment, a second I/O pin selectively couplable to the second analog bus segment, and a third I/O pin selectively couplable to the third analog bus segment. A first switch is configured to selectively propagate a first analog signal on the first analog bus segment to the second analog bus segment, and a second switch is configured to selectively propagate a second analog signal on the first analog bus segment to the third analog bus segment. In a first mode of operation, the first and second switches are open. In a second mode of operation, the first switch is closed. In a third mode of operation, the second switch is closed.Type: ApplicationFiled: April 4, 2019Publication date: July 25, 2019Applicant: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Warren S. Snyder, Timothy John Williams, Eashwar Thiagarajan
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Patent number: 10345377Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: GrantFiled: April 3, 2018Date of Patent: July 9, 2019Assignee: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E. Hastings, Dennis R. Seguine
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Publication number: 20180292454Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: ApplicationFiled: April 3, 2018Publication date: October 11, 2018Applicant: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Patent number: 10033403Abstract: An integrated circuit device can include at least one input; at least one output configured to provide a multi-bit output value; at least one input; at least one output configured to provide a multi-bit output value; a plurality of configurable digital filter circuits; and switch circuits coupled to the at least one input and to the at least one output, the switch circuits configurable to connect same digital filter circuits as a single processing path or separate processing paths.Type: GrantFiled: June 11, 2015Date of Patent: July 24, 2018Assignee: Cypress Semiconductor CorporationInventors: Eashwar Thiagarajan, Jean-Paul Vanitegem, Harold M. Kutz, Anasuya Pai Maroor, Kendall V. Castor-Perry
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Patent number: 9973200Abstract: Methods and apparatus include and amplifier circuit and a first capacitor branch including a first plurality of capacitors. The first capacitor branch couples to an input signal and to an input of the amplifier circuit. A second capacitor branch includes a second plurality of capacitors. The second capacitor branch couples to the input of the amplifier circuit and to an output of the amplifier circuit.Type: GrantFiled: January 27, 2017Date of Patent: May 15, 2018Assignee: Cypress Semiconductor CorporationInventors: Jaskarn Singh Johal, Erhan Hancioglu, Renee Leong, Harold M. Kutz, Eashwar Thiagarajan, Onur Ozbek
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Patent number: 9960773Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.Type: GrantFiled: September 19, 2016Date of Patent: May 1, 2018Assignee: Cypress Semiconductor CorporationInventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Carl Ferdinand Liepold, Onur Ozbek
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Patent number: 9952282Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.Type: GrantFiled: September 21, 2015Date of Patent: April 24, 2018Assignee: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Timothy John Williams, Bert S. Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
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Patent number: 9880536Abstract: A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller.Type: GrantFiled: September 25, 2015Date of Patent: January 30, 2018Assignee: Cypress Semiconductor CorporationInventors: Bert S. Sullam, Harold M. Kutz, Monte Mar, Eashwar Thiagarajan, Timothy Williams, David G. Wright
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Publication number: 20170371824Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.Type: ApplicationFiled: July 11, 2017Publication date: December 28, 2017Applicant: Cypress Semiconductor CorporationInventors: Timothy John Williams, David G. Wright, Harold M. Kutz, Eashwar Thiagarajan, Warren S. Snyder, Mark E Hastings
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Publication number: 20170286344Abstract: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.Type: ApplicationFiled: March 20, 2017Publication date: October 5, 2017Applicant: Cypress Semiconductor CorporationInventors: Bert S. Sullam, Harold M. Kutz, Timothy John Williams, James H. Shutt, Bruce E. Byrkett, Melany Ann Richmond, Nathan Wayne Kohagen, Mark E. Hastings, Eashwar Thiagarajan, Warren S. Snyder
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Publication number: 20170201266Abstract: Methods and apparatus include and amplifier circuit and a first capacitor branch including a first plurality of capacitors. The first capacitor branch couples to an input signal and to an input of the amplifier circuit. A second capacitor branch includes a second plurality of capacitors. The second capacitor branch couples to the input of the amplifier circuit and to an output of the amplifier circuit.Type: ApplicationFiled: January 27, 2017Publication date: July 13, 2017Applicant: Cypress Semiconductor CorporationInventors: Jaskarn Singh Johal, Erhan Hancioglu, Renee Leong, Harold M. Kutz, Eashwar Thiagarajan, Onur Ozbek
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Patent number: 9692442Abstract: A device, system, and method of a programmable circuit configured to operate in a buffered drive mode and blanking mode is disclosed. The programmable circuit includes a continuous-time digital-to-analog converter (CTDAC), a continuous-time block (CTB), coupled to the CTDAC, and a sample and hold (SH) circuit coupled to the CTDAC and the CTB. The programmable circuit is configured to operate in a buffered drive mode to buffer an output signal from the CTDAC. The programmable circuit, in buffered drive mode, is further configured to operate in a blanking mode to cause the SH circuit to perform a blanking operation on the CTDAC output signal.Type: GrantFiled: December 21, 2016Date of Patent: June 27, 2017Assignee: Cypress Semiconductor CorporationInventors: Harold M. Kutz, Erhan Hancioglu, Timothy John Williams, Hans Klein, Eric N. Mann
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Patent number: 9634667Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.Type: GrantFiled: March 26, 2015Date of Patent: April 25, 2017Assignee: Cypress Semiconductor CorporationInventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Bruce E. Byrkett, Carl Ferdinand Liepold, Hans Van Antwerpen
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Publication number: 20170085268Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.Type: ApplicationFiled: September 19, 2016Publication date: March 23, 2017Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Carl Ferdinand Liepold, Onur Ozbek
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Patent number: 9590592Abstract: A fingerprint sensing circuit, system, and method is disclosed. The fingerprint sensor maybe include a plurality of inputs coupled to a plurality of fingerprint sensing electrodes and to an analog front end. The analog front end may be configured to generate at least one digital value in response to a capacitance of at least one of the plurality of fingerprint sensing electrodes. Additionally, the analog front end may include a quadrature demodulation circuit to generate at least one demodulated value for processing by a channel engine. The channel engine may generate a capacitance result value that is based, in part, on the demodulated value and is stored in a memory.Type: GrantFiled: June 26, 2015Date of Patent: March 7, 2017Assignee: Cypress Semiconductor CorporationInventors: Jaskarn Singh Johal, Erhan Hancioglu, Renee Leong, Harold M. Kutz, Eashwar Thiagarajan, Onur Ozbek
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Publication number: 20160329900Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.Type: ApplicationFiled: March 26, 2015Publication date: November 10, 2016Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Onur Ozbek, Carl Ferdinand Liepold
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Patent number: 9473144Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.Type: GrantFiled: March 26, 2015Date of Patent: October 18, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Onur Ozbek, Carl Ferdinand Liepold
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Publication number: 20160285433Abstract: A fingerprint sensing circuit, system, and method is disclosed. The fingerprint sensor maybe include a plurality of inputs coupled to a plurality of fingerprint sensing electrodes and to an analog front end. The analog front end may be configured to generate at least one digital value in response to a capacitance of at least one of the plurality of fingerprint sensing electrodes. Additionally, the analog front end may include a quadrature demodulation circuit to generate at least one demodulated value for processing by a channel engine. The channel engine may generate a capacitance result value that is based, in part, on the demodulated value and is stored in a memory.Type: ApplicationFiled: June 26, 2015Publication date: September 29, 2016Inventors: Jaskarn Singh Johal, Erhan Hancioglu, Renee Leong, Harold M. Kutz, Eashwar Thiagarajan, Onur Ozbek
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Publication number: 20160065216Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.Type: ApplicationFiled: March 26, 2015Publication date: March 3, 2016Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Bruce E. Byrkett, Carl Ferdinand Liepold, Hans Van Antwerpen