Abstract: A method for registration of first and second images out of registration. The method includes the steps of: (a) making the edges in the first and second images more prominent; (b) thresholding the first and second images from the previous step using a threshold for which N percent of the pixels of each of the first and second images are over the threshold; (c) reducing the resolution of the first and second images from the previous step; and (d) registering the first and second images of reduced resolution from the previous step.

Abstract: Methods for registering first and second images which are offset by an x and/or y displacement in sub-pixel locations are provided.

Abstract: A method for registration of first and second images out of registration. The method includes the steps of: (a) making the edges in the first and second images more prominent; (b) thresholding the first and second images from the previous step using a threshold for which N percent of the pixels of each of the first and second images are over the threshold; (c) reducing the resolution of the first and second images from the previous step; and (d) registering the first and second images of reduced resolution from the previous step.

Abstract: A transmitter for transmitting data in the form of an optical signal. The transmitter having: a transmitter chip module having a material capable of radiating light of a first wavelength when both a zero voltage potential exists across the material and when illuminated by light of a second wavelength; a light source optically coupled to the transmitter chip module for illuminating the material with light of the second wavelength; and a voltage controller for controlling the voltage potential across the first material. Also provided is a receiver for receiving data in the form of an optical signal having a first wavelength.

Abstract: A method for prefetching structured data, and more particularly a mechanism for observing address references made by a processor, and learning from those references the patterns of accesses made to structured data. Structured data means aggregates of related data such as arrays, records, and data containing links and pointers. When subsequent accesses are made to data structured in the same way, the mechanism generates in advance the sequence of addresses that will be needed for the new accesses. This sequence is utilized by the memory to obtain the data somewhat earlier than the instructions would normally request it, and thereby eliminate idle time due to memory latency while awaiting the arrival of the data.

Abstract: This invention enables progressively higher resolution images of a JPEG compressed image to be produced in a cost effective manner during the JPEG decompression process. The operation count is very low when images of {fraction (1/64)}th, {fraction (1/16)}th, and ¼th of full resolution are to be produced without doing a full JPEG decompression. The low resolution images are useful for high speed search, and the ability to produce them without doing full decompression is an important factor in making such search practical.

Abstract: A multiresolution method and apparatus for searching of a database of images where the search is performed on compressed images, without first decompressing them. The method searches the database of compressed images first at a low resolution to obtain the relative quality of a match between a search template and a candidate image. If the match is below a particular threshold, the search is terminated without committing any further computational resources to the search. Conversely, if the match is above a particular threshold, the method enhances the resolution of the candidate image and then performs another match. As long as the relative quality of the match is above the particular threshold, the resolution of the candidate image is successively enhanced, until a match determination is made at a full resolution of the candidate image.

Abstract: A computer-implemented process for determining a ranked set of solutions to a bipartite graph matching problem, such is involved in multi-target tracking, maximum flow matching, or data association in matching elements of a first set to elements of a second set to minimize the cost of the association. A feature of the process is a partitioning into subproblems such that the most probable solutions are in the smaller subproblems and the computation begins by solving the smallest subproblem in the search for the best solution.

Abstract: A Write/Load cache protocol is described which may be used for maintaining cache coherency and performing barrier synchronization in multiprocessor computer systems, and for cooperating with prefetch mechanisms to allow data to be loaded into a central processor unit's (CPU) cache (in both single and multiprocessor systems) in anticipation of future memory references. The new protocol is defined such that when a cache observes a Write/Load command (and associated data item) on a bus to which the cache is attached, the cache is accessed and (a) if the data item is in the cache, the new value of the data item from the bus is copied into and replaces the data item in cache; and (b) if the data item is not in the cache, a new data item is created therein (preferably using the normal cache replacement policy), and the value of the data item on the bus is loaded into the cache. Thus, a protocol is provided which allows cache to be loaded via an external entity, i.e.

Abstract: The invention is a system and method for improving the signal-to-noise ratio of an electrical data signal transmitted between two electronic modules. An electrical data signal from a first module is amplified by an electrical amplifier to produce an amplified electrical data signal. The electrical amplifier is supplied by a power distribution network. The amplified electrical data signal has a power level sufficiently low such that the electrical amplifier does not cause significant disturbances in the power distribution network so that a plurality of the electrical amplifiers can be proximately located and operated concurrently without significant noise coupling occurring between the electrical amplifiers through the power distribution network. The electrical data signal is then converted to an optical data signal for transmission to a second module. The optical data signal is transmitted to the second module through an optical path where it is optically amplified.

Abstract: A combining switch that reduces memory accesses, synchronizes parallel processors and is easy to implement, is achieved by configuring a plurality of parallel processing nodes in a ring arrangement and by implementing a synchronizing instruction for the switch that facilitates, rather than inhibits, parallel processing. According to the preferred embodiment of the invention the ring is a token ring and the synchronizing instruction is a Fetch-and-Add instruction.

Abstract: A mechanism within a disk controller that computes the number of units of storage space accessed as a function of either real or virtual time. A counter is set to a reference count. Each unit of storage space has a predetermined bit set to a predetermined state indicative that the unit of storage space has not been accessed. The unit of storage space is accessed, and if the predetermined bit is in the predetermined state, the state is changed to indicate access. The counter is incremented in response to the change of state of the predetermined bit, with the count being indicative of the number of units of storage space accessed. This so-called "footprint" function can be used by the disk controller as input for an algorithm that attempts to optimize cache performance.

Abstract: An optical bus for interconnecting electronic devices. The bus has a substrate with through-holes therein. An optically conductive material is disposed on one side of the substrate. The material fills the through-holes and forms a layer of predetermined thickness on this side of the substrate. In the outer surface of this layer there are facets or angled regions. The surface and facets are optically reflective. Cards or modules are optically connected by means of optical connectors to the through-holes on the opposite side of the substrate. Light emitted by the connector travels to the associated faceted surface from which it reflects towards other faceted surfaces from which it is partially transmitted and partially reflected to another connector. The arrangement permits optical communication between a plurality of electronic devices.

Abstract: Suspensions of programs running in a multi-programming environment are made to occur when the footprint of a program to be suspended is relatively small. This occurs when a process releases data or instruction storage in the cache because the program has moved to a different phase of behavior. An interrupt is armed to occur at small-footprint points, and then the point where that occurs is detected.

Abstract: A parallel synchronization technique utilizing a combining network in which two processors synchronize by having one processor suspend operation while the other processor becomes the agent for the one processor, while continuing to operate on its own behalf. This reduces the access requests and subsequent contention caused by multiple concurrent requests to a common variable.

Abstract: A system for the adaptive reordering of sequential decisions in the search of a data base is provided with a device that simplifies and speeds up a heuristic search method by implementing in hardware the computation required for the adaptive reordering. The system includes an arithmetic unit for computing for each decision the ratio p/c where p is the probability of a successful outcome of the decision and c is the cost of computation to make that decision. The arithmetic unit includes a device for estimating the logarithms of the prabability p and the cost c for each decision. Logarithms of ratios p/c are calculated for each decision by subtracting the log c from the log p, and then the logarithms of the ratios for the decisions are compared to produce a priority value for each decision. The decisions are reordered based on the priority value assigned to each decision to obtain the optimal ordering of the decisions.

Abstract: An adaptive mechanism is presented in the context of optimization of expert system applications. Both single and multiple processor implementations are disclosed. The mechanism is used to maintain a near-optimal sequence for scanning rule lists in expert systems. For a program containing a sequential-decision chain with many independent or mutually exclusive outcomes with each decision having associated with it some fixed cost and probability, the adaptive mechanism tends to produce the optimal ordering automatically from repeated observations of the execution of the decision chain.