Patents by Inventor Harrie HORSTINK

Harrie HORSTINK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11165425
    Abstract: This disclosure relates to a power supply detection circuit, including: a first input stage field effect transistor; an inverter stage; and a feedback stage field effect transistor. The inverter stage includes a complimentary pair of transistors that includes an NMOS transistor and a PMOS transistor configured and arranged such that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a power supply detection circuit.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: November 2, 2021
    Assignee: NEXPERIA B.V.
    Inventors: Geethanadh Asam, Harrie Horstink, Walter Tercariol
  • Patent number: 10917073
    Abstract: This disclosure relates to a filter circuit for an output stage of an electronic circuit. The filter circuit includes a capacitor connected between a supply voltage and a first transistor. The first transistor is arranged as a diode connected transistor; a second transistor is connected to the first transistor so that the first and second transistors are arranged as a current mirror. The capacitor is connected to the first and second transistors and configured and arranged so that during operation the first transistor, the second transistor and the capacitor operate as a high pass filter.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: February 9, 2021
    Assignee: Nexperia B.V.
    Inventors: Geethanadh Asam, Harrie Horstink
  • Publication number: 20200304125
    Abstract: This disclosure relates to a power supply detection circuit, including: a first input stage field effect transistor; an inverter stage; and a feedback stage field effect transistor. The inverter stage includes a complimentary pair of transistors that includes an NMOS transistor and a PMOS transistor configured and arranged such that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a power supply detection circuit.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 24, 2020
    Applicant: NEXPERIA B.V.
    Inventors: Geethanadh Asam, Harrie Horstink, Walter Tercariol
  • Publication number: 20200136591
    Abstract: This disclosure relates to a filter circuit for an output stage of an electronic circuit. The filter circuit includes a capacitor connected between a supply voltage and a first transistor. The first transistor is arranged as a diode connected transistor; a second transistor is connected to the first transistor so that the first and second transistors are arranged as a current mirror. The capacitor is connected to the first and second transistors and configured and arranged so that during operation the first transistor, the second transistor and the capacitor operate as a high pass filter.
    Type: Application
    Filed: October 25, 2019
    Publication date: April 30, 2020
    Applicant: NEXPERIA B.V.
    Inventors: Geethanadh ASAM, Harrie HORSTINK