Abstract: A system and method for signaling a deferred response to a data request in a bus connected system is described. In one embodiment, a responding agent on the bus issues a deferred response message when it cannot supply the requested data in a short period of time. When the responding agent knows that the requested data will shortly arrive in its buffers, it may first send an identification signal to the requesting agent, indicating to the requesting agent that it should prepare to receive the data shortly. After one or more bus clock cycles, the responding agent may then subsequently send the corresponding data message to the requesting agent.

Abstract: A system and method for accessing control registers in a computer system is described. In one embodiment, a control register is given an address which is outside the normal input/output addressable range. Additionally, this control register may be physically located in system circuits separate from the processor functional circuitry. Such a control register may not be accessible via normal user input/output instructions. Special microcode may be used to access these control registers. The special microcode may be executed by special system events. These special events may include loading a microcode patch, or by entering a special debug mode, or by test access using a test access port.

Abstract: A method and apparatus for improved performance for handling priority agent bus requests when symmetric agent bus parking is enabled is disclosed. In one embodiment, a modified priority agent may be used. The modified priority agent may assert an unused symmetric agent bus request when it asserts its priority agent bus request. When a symmetric agent parks on the bus, continually asserting its symmetric agent bus request, the assertion of the otherwise unused symmetric agent bus request may cause the symmetric agent to withdraw its symmetric agent bus request. This may reduce bus response time for subsequent modified priority agent bus requests.