Patents by Inventor Harris M. Morgenstern
Harris M. Morgenstern has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11726904Abstract: A transient input/output in progress state is established during processing of an input/output testcase by a test infrastructure in a computing environment. The method includes obtaining the input/output testcase for an object having one or more pages, and processing the input/output testcase by the test infrastructure. Processing the input/output testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the input/output testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more concurrent test operations are to reference the page of the object.Type: GrantFiled: September 23, 2021Date of Patent: August 15, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Miller, Jr., Harris M. Morgenstern, Charles Eugene Mari, Christopher Lee Wood, Alfred Francis Foster
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Publication number: 20230236959Abstract: A transient input/output in progress state is established during processing of a testcase by a test infrastructure in a computing environment. The method includes obtaining the testcase for an object having one or more pages, and processing the testcase by the test infrastructure. Processing the testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more test operations reference the page of the object.Type: ApplicationFiled: April 5, 2023Publication date: July 27, 2023Inventors: Robert MILLER, JR., Harris M. MORGENSTERN, Charles Eugene MARI, Christopher Lee WOOD, Alfred Francis FOSTER
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Publication number: 20230086432Abstract: A transient input/output in progress state is established during processing of an input/output testcase by a test infrastructure in a computing environment. The method includes obtaining the input/output testcase for an object having one or more pages, and processing the input/output testcase by the test infrastructure. Processing the input/output testcase by the test infrastructure includes, for a page of the object, generating a delay in the processing of the input/output testcase for the page of the object. The delay opens a transient input/output in progress state during which one or more concurrent test operations are to reference the page of the object.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Inventors: Robert MILLER, JR., Harris M. MORGENSTERN, Charles Eugene MARI, Christopher Lee WOOD, Alfred Francis FOSTER
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Patent number: 11321239Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.Type: GrantFiled: December 21, 2020Date of Patent: May 3, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Harris M. Morgenstern, Elpida Tzortzatos, Scott B. Compton, Steven M. Partlow
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Publication number: 20210109863Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Inventors: Harris M. Morgenstern, Elpida Tzortzatos, Scott B. Compton, Steven M. Partlow
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Patent number: 10891238Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.Type: GrantFiled: June 28, 2019Date of Patent: January 12, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Harris M. Morgenstern, Elpida Tzortzatos, Scott B. Compton, Steven M. Partlow
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Patent number: 10884950Abstract: Memory management is provided which includes a page replacement process managed by a storage manager and a workload manager. The page replacement process swaps out the content associated with a frame of physical memory to an auxiliary storage in order to provide a free frame. The memory management process includes: determining that the physical memory runs out of free frames; providing priority information from the workload manager to the storage manager, the priority information indicating the priority or business relevance of a certain process; selecting one or more pages to be swapped to the auxiliary storage based on the priority information; and swapping out the contents of the one or more selected pages to the auxiliary storage.Type: GrantFiled: May 16, 2016Date of Patent: January 5, 2021Assignee: International Business Machines CorporationInventors: Harris M. Morgenstern, Horst Sinram, Elpida Tzortzatos, Dieter Wellerdiek
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Publication number: 20200409862Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Inventors: Harris M. Morgenstern, Elpida Tzortzatos, Scott B. Compton, Steven M. Partlow
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Patent number: 10705983Abstract: Embodiments are provided for implementing a transparent conversion of common virtual storage requests to storage with limited access. Embodiments include providing a storage manager configured to perform address translation for requests, providing a data address translation (DAT) structure configured to connect a higher-level DAT table to a lower-level DAT table, and creating the DAT structure based on a request from a process. Embodiments also include responsive to receiving a storage request, performing a DAT fault process based on validating user credentials associated with an entry of the higher-level DAT table corresponding to the storage request, and responsive to the validation, updating the higher-level DAT table entry to allow access to the restricted-use portion of the common virtual storage, and otherwise, returning a DAT fault for the higher-level DAT table entry.Type: GrantFiled: March 1, 2019Date of Patent: July 7, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Elpida Tzortzatos, Michael Gary Spiegel, Karl David Schmitz, Steven Partlow, Harris M. Morgenstern, David Hom, Peter Fatzinger
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Patent number: 10565114Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.Type: GrantFiled: November 13, 2017Date of Patent: February 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Harris M. Morgenstern, Steven M. Partlow, Christopher L. Wood
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Patent number: 10552326Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.Type: GrantFiled: May 23, 2017Date of Patent: February 4, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Harris M. Morgenstern, Steven M. Partlow, Christopher L. Wood
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Patent number: 10372352Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.Type: GrantFiled: February 23, 2017Date of Patent: August 6, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
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Patent number: 10168960Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.Type: GrantFiled: November 14, 2017Date of Patent: January 1, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
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Publication number: 20180341590Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.Type: ApplicationFiled: November 13, 2017Publication date: November 29, 2018Inventors: Harris M. Morgenstern, Steven M. Partlow, Christopher L. Wood
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Publication number: 20180341589Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.Type: ApplicationFiled: May 23, 2017Publication date: November 29, 2018Inventors: Harris M. Morgenstern, Steven M. Partlow, Christopher L. Wood
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Publication number: 20180314557Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.Type: ApplicationFiled: September 4, 2015Publication date: November 1, 2018Inventors: David Hom, Charles E. Mari, Robert J. Miller, JR., Harris M. Morgenstern, Elpida Tzortzatos
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Patent number: 10114853Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.Type: GrantFiled: September 4, 2015Date of Patent: October 30, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Hom, Charles E. Mari, Robert J. Miller, Jr., Harris M. Morgenstern, Elpida Tzortzatos
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Patent number: 10108466Abstract: A method, a computer program product, and a system for performing a batch processing are provided. The batch processing includes initializing a set of elements corresponding to a set of resources to produce an initialized group and chaining the initialized group to previously initialized elements to produce an element batch, when the previously initialized elements are available. The batch processing further includes setting a system lock on the set of resources after the element batch is produced; executing a service routine to move the element batch to a queue by referencing first and last elements of the element batch; and releasing the system lock on the set of resources once the service routine is complete.Type: GrantFiled: June 29, 2015Date of Patent: October 23, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Hom, Charles E. Mari, Robert Miller, Jr., Harris M. Morgenstern, Elpida Tzortzatos
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Patent number: 10061518Abstract: In one embodiment, a computer-implemented method includes building an available frame header queue (AFHQ). The AFHQ includes one or more headers, each header including one or more frame references being no more than a maximum count of frame references. Each of the one or more frame references of each of the one or more headers refers to an available frame. A frame request is received for one or more requested frames. One or more frame references are extracted, by a computer processor, from the AFHQ in response to the frame request. The extracting includes extracting from the AFHQ one or more requested headers including the one or more frame references referring to at least a portion of the one or more requested frames.Type: GrantFiled: November 29, 2017Date of Patent: August 28, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Hom, Harris M. Morgenstern, Steven M. Partlow, Scott B. Tuttle, Elpida Tzortzatos
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Publication number: 20180088868Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.Type: ApplicationFiled: November 14, 2017Publication date: March 29, 2018Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK