Patents by Inventor Harry D. Cox
Harry D. Cox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10041183Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.Type: GrantFiled: April 10, 2017Date of Patent: August 7, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
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Patent number: 9853006Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.Type: GrantFiled: June 24, 2016Date of Patent: December 26, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
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Patent number: 9804498Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.Type: GrantFiled: June 9, 2014Date of Patent: October 31, 2017Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Harry D. Cox, Arthur G. Merryman, Jennifer D. Schuler
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Patent number: 9728440Abstract: A method for processing a semiconductor wafer where an opaque layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be detected through optical sensors. The opaque layer may be modified, or oriented, to allow light to pass through unobstructed.Type: GrantFiled: October 28, 2014Date of Patent: August 8, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Jorge A. Lubguban, Eric D. Perfecto, Jennifer D. Schuler
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Publication number: 20170211199Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.Type: ApplicationFiled: April 10, 2017Publication date: July 27, 2017Applicant: GlobalFoundries Inc.Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
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Patent number: 9689084Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.Type: GrantFiled: May 22, 2014Date of Patent: June 27, 2017Assignee: GLOBALFOUNRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
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Patent number: 9679796Abstract: A method for processing a semiconductor wafer where an electrostatic layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be handled with machinery that uses an electrostatic chuck. The electrostatic layer may be manipulated to increase or decrease the conductivity, and may be removed to allow light to pass through the handling wafer.Type: GrantFiled: October 28, 2014Date of Patent: June 13, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Jorge A. Lubguban, Jennifer D. Schuler
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Publication number: 20160307860Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.Type: ApplicationFiled: June 24, 2016Publication date: October 20, 2016Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
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Patent number: 9401336Abstract: A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact trench and the contact trench is utilized to form the contact therein. The trench-layer includes a lower barrier trench layer and an upper photoprocessing layer. The photoprocessing layer is utilized pattern and form contact trench. The barrier layer protects an electroplating conductive layer utilized in forming the contact from corrosion that may occur during the removal of the photoprocessing layer.Type: GrantFiled: November 4, 2014Date of Patent: July 26, 2016Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Sarah H. Knickerbocker, Karen P. McLaughlin, David J. Russell
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Patent number: 9396991Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.Type: GrantFiled: August 25, 2014Date of Patent: July 19, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
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Publication number: 20160126201Abstract: A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact trench and the contact trench is utilized to form the contact therein. The trench-layer includes a lower barrier trench layer and an upper photoprocessing layer. The photoprocessing layer is utilized pattern and form contact trench. The barrier layer protects an electroplating conductive layer utilized in forming the contact from corrosion that may occur during the removal of the photoprocessing layer.Type: ApplicationFiled: November 4, 2014Publication date: May 5, 2016Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Sarah H. Knickerbocker, Karen P. McLaughlin, David J. Russell
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Publication number: 20160118283Abstract: A method for processing a semiconductor wafer where an electrostatic layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be handled with machinery that uses an electrostatic chuck. The electrostatic layer may be manipulated to increase or decrease the conductivity, and may be removed to allow light to pass through the handling wafer.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Inventors: Charles L. Arvin, Harry D. Cox, Jorge A. Lubguban, Jennifer D. Schuler
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Publication number: 20160118287Abstract: A method for processing a semiconductor wafer where an opaque layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be detected through optical sensors. The opaque layer may be modified, or oriented, to allow light to pass through unobstructed.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Jorge A. Lubguban, Eric D. Perfecto, Jennifer D. Schuler
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Publication number: 20160056072Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.Type: ApplicationFiled: August 25, 2014Publication date: February 25, 2016Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
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Publication number: 20150352476Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.Type: ApplicationFiled: June 9, 2014Publication date: December 10, 2015Inventors: Charles L. Arvin, Harry D. Cox, Arthur G. Merryman, Jennifer D. Schuler
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Publication number: 20150348910Abstract: A structure including a stack of conformal layers on top of a dielectric layer and within an opening in the dielectric layer, the stack of layers including a first layer, a second layer, a third layer, and a fourth layer, each formed successively one on top of another with the first layer being in direct contact with the dielectric layer, and a conductive feature located directly on top of the fourth layer within the opening.Type: ApplicationFiled: August 11, 2015Publication date: December 3, 2015Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, John J. Garant, Ekta Misra, Nicholas A. Polomoff, Jennifer D. Schuler
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Publication number: 20150337451Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.Type: ApplicationFiled: May 22, 2014Publication date: November 26, 2015Applicant: International Business Machines CorporationInventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
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Publication number: 20150311161Abstract: A method including forming a stack of layers on top of a dielectric layer and within an opening in the dielectric layer, the stack of layers comprising a first layer, a second layer, a third layer, and a fourth layer, each formed successively one on top of another, removing a first portion of the fourth layer outside the opening to expose a portion of the third layer, a second portion of the fourth layer remains within the opening, filling the opening with a metal by applying an electrical potential to the second layer during an electroplating technique in which the metal plates out on the fourth layer but does not plate out on the third layer, and removing portions of the first layer, the second layer, and the third layer to expose an upper surface of the dielectric layer between the opening and an adjacent opening.Type: ApplicationFiled: April 28, 2014Publication date: October 29, 2015Applicant: International Business Machines CorporationInventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, John J. Garant, Ekta Misra, Nicholas A. Polomoff, Jennifer D. Schuler
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Patent number: 9035459Abstract: Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.Type: GrantFiled: April 10, 2009Date of Patent: May 19, 2015Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Raschid J. Bezama, Harry D. Cox, Timothy H. Daubenspeck, Krystyna W. Semkow, Timothy D. Sullivan
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Patent number: 8803317Abstract: Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.Type: GrantFiled: March 29, 2012Date of Patent: August 12, 2014Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Raschid J. Bezama, Harry D. Cox, Timothy H. Daubenspeck, Krystyna W. Semkow, Timothy D. Sullivan