Patents by Inventor Harry D. Cox

Harry D. Cox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10041183
    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: August 7, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
  • Patent number: 9853006
    Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 26, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
  • Patent number: 9804498
    Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: October 31, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Harry D. Cox, Arthur G. Merryman, Jennifer D. Schuler
  • Patent number: 9728440
    Abstract: A method for processing a semiconductor wafer where an opaque layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be detected through optical sensors. The opaque layer may be modified, or oriented, to allow light to pass through unobstructed.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: August 8, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Jorge A. Lubguban, Eric D. Perfecto, Jennifer D. Schuler
  • Publication number: 20170211199
    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 27, 2017
    Applicant: GlobalFoundries Inc.
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
  • Patent number: 9689084
    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: June 27, 2017
    Assignee: GLOBALFOUNRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
  • Patent number: 9679796
    Abstract: A method for processing a semiconductor wafer where an electrostatic layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be handled with machinery that uses an electrostatic chuck. The electrostatic layer may be manipulated to increase or decrease the conductivity, and may be removed to allow light to pass through the handling wafer.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: June 13, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Jorge A. Lubguban, Jennifer D. Schuler
  • Publication number: 20160307860
    Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 20, 2016
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
  • Patent number: 9401336
    Abstract: A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact trench and the contact trench is utilized to form the contact therein. The trench-layer includes a lower barrier trench layer and an upper photoprocessing layer. The photoprocessing layer is utilized pattern and form contact trench. The barrier layer protects an electroplating conductive layer utilized in forming the contact from corrosion that may occur during the removal of the photoprocessing layer.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: July 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Sarah H. Knickerbocker, Karen P. McLaughlin, David J. Russell
  • Patent number: 9396991
    Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: July 19, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
  • Publication number: 20160126201
    Abstract: A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact trench and the contact trench is utilized to form the contact therein. The trench-layer includes a lower barrier trench layer and an upper photoprocessing layer. The photoprocessing layer is utilized pattern and form contact trench. The barrier layer protects an electroplating conductive layer utilized in forming the contact from corrosion that may occur during the removal of the photoprocessing layer.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 5, 2016
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Sarah H. Knickerbocker, Karen P. McLaughlin, David J. Russell
  • Publication number: 20160118283
    Abstract: A method for processing a semiconductor wafer where an electrostatic layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be handled with machinery that uses an electrostatic chuck. The electrostatic layer may be manipulated to increase or decrease the conductivity, and may be removed to allow light to pass through the handling wafer.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 28, 2016
    Inventors: Charles L. Arvin, Harry D. Cox, Jorge A. Lubguban, Jennifer D. Schuler
  • Publication number: 20160118287
    Abstract: A method for processing a semiconductor wafer where an opaque layer is located on a surface of a handling wafer is used so the surface of the handling wafer may be detected through optical sensors. The opaque layer may be modified, or oriented, to allow light to pass through unobstructed.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 28, 2016
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, Jorge A. Lubguban, Eric D. Perfecto, Jennifer D. Schuler
  • Publication number: 20160056072
    Abstract: A three dimensional multi-die package includes a first die and second die. The first die includes a contact attached to solder. The second die is thinned by adhesively attaching a handler to a top side of the second die and thinning a bottom side of the second die. The second die includes a multilayer contact of layered metallurgy that inhibits transfer of adhesive thereto. The layered metallurgy includes at least one layer that is wettable to the solder. The multilayer contact may include a Nickel layer, a Copper layer upon the Nickel layer, and a Nickel-Iron layer upon the Copper layer. The multilayer contact may also include a Nickel layer, a Copper-Tin layer upon the Nickel layer, and a Tin layer upon the Copper-Tin layer.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 25, 2016
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto, Thomas A. Wassick
  • Publication number: 20150352476
    Abstract: A photoresist stripping tool includes a reservoir configured to contain photoresist stripping solution and a Pb filter comprising a filter element with Tin (Sn) exterior surfaces. A semiconductor wafer fabrication system includes a semiconductor wafer attached to the photoresist stripping tool that strips photoresist from the semiconductor wafer. A photoresist stripping processes includes stripping photoresist from a leaded semiconductor wafer with photoresist stripping solution within the photoresist stripping tool, filtering Lead Pb from the photoresist stripping solution with the Pb filter, and stripping photoresist from a lead-free semiconductor wafer with the filtered photoresist stripping solution.
    Type: Application
    Filed: June 9, 2014
    Publication date: December 10, 2015
    Inventors: Charles L. Arvin, Harry D. Cox, Arthur G. Merryman, Jennifer D. Schuler
  • Publication number: 20150348910
    Abstract: A structure including a stack of conformal layers on top of a dielectric layer and within an opening in the dielectric layer, the stack of layers including a first layer, a second layer, a third layer, and a fourth layer, each formed successively one on top of another with the first layer being in direct contact with the dielectric layer, and a conductive feature located directly on top of the fourth layer within the opening.
    Type: Application
    Filed: August 11, 2015
    Publication date: December 3, 2015
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, John J. Garant, Ekta Misra, Nicholas A. Polomoff, Jennifer D. Schuler
  • Publication number: 20150337451
    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 26, 2015
    Applicant: International Business Machines Corporation
    Inventors: Charles L. Arvin, Harry D. Cox, Eric D. Perfecto
  • Publication number: 20150311161
    Abstract: A method including forming a stack of layers on top of a dielectric layer and within an opening in the dielectric layer, the stack of layers comprising a first layer, a second layer, a third layer, and a fourth layer, each formed successively one on top of another, removing a first portion of the fourth layer outside the opening to expose a portion of the third layer, a second portion of the fourth layer remains within the opening, filling the opening with a metal by applying an electrical potential to the second layer during an electroplating technique in which the metal plates out on the fourth layer but does not plate out on the third layer, and removing portions of the first layer, the second layer, and the third layer to expose an upper surface of the dielectric layer between the opening and an adjacent opening.
    Type: Application
    Filed: April 28, 2014
    Publication date: October 29, 2015
    Applicant: International Business Machines Corporation
    Inventors: Charles L. Arvin, Harry D. Cox, Brian M. Erwin, John J. Garant, Ekta Misra, Nicholas A. Polomoff, Jennifer D. Schuler
  • Patent number: 9035459
    Abstract: Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: May 19, 2015
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Raschid J. Bezama, Harry D. Cox, Timothy H. Daubenspeck, Krystyna W. Semkow, Timothy D. Sullivan
  • Patent number: 8803317
    Abstract: Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Raschid J. Bezama, Harry D. Cox, Timothy H. Daubenspeck, Krystyna W. Semkow, Timothy D. Sullivan