Patents by Inventor Harry J. Levinson

Harry J. Levinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090239155
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 24, 2009
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Harry J. LEVINSON, Uzodinma OKOROANYANWU, Anna TCHIKOULAEVA, Rene WIRTZ
  • Patent number: 7563560
    Abstract: A polyelectrolyte solution for tuning a surface energy and a method for using the polyelectrolyte solution to manufacture an integrated circuit. A substrate is provided and a photosensitive material having a surface energy is formed over the substrate. The substrate may be polysilicon, silicon dioxide, silicon nitride, metal, and the like. The photosensitive material is treated with a polyelectrolyte solution to change the surface energy of the photosensitive material. Treatment techniques for applying the polyelectrolyte solution may include spraying, bathing, rinsing, soaking, or washing. The polyelectrolyte adsorbs to the photosensitive material forming a polyelectrolyte polymer layer on the photosensitive material. The photosensitive material may be a photoresist or a photoresist having a topcoat formed thereon. The photosensitive material is exposed using lithography techniques and processed to form a patterned layer of photosensitive material for use in manufacturing the integrated circuit.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: July 21, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Adam R. Pawloski, Harry J. Levinson
  • Publication number: 20080257383
    Abstract: In one disclosed embodiment, the present method for semiconductor fabrication utilizing a cleaning substrate comprises loading a cleaning substrate capable of removing an undesirable particle from a semiconductor processing tool onto the tool, causing the undesirable particle to be attracted to the cleaning substrate, and unloading the cleaning substrate from the semiconductor processing tool. Following cleaning, the processing tool can be used for producing a lithographic pattern on a semiconductor wafer. In one embodiment, the cleaning substrate comprises an electret. In another embodiment, the cleaning substrate comprises an adhesive layer. The present method can be used without breaking vacuum, or otherwise altering the operational state of a processing tool. In one embodiment, the present method is used in conjunction with an exposure tool utilized for high resolution lithography, for example, an extreme ultraviolet (EUV) lithographic exposure tool.
    Type: Application
    Filed: April 23, 2007
    Publication date: October 23, 2008
    Inventor: Harry J. Levinson
  • Publication number: 20080233494
    Abstract: In one disclosed embodiment, a method for forming a high resolution resist pattern on a semiconductor wafer involves forming a layer of resist comprising, for example a polymer matrix and a catalytic species, over a material layer formed over a semiconductor wafer; exposing the layer of resist to patterned radiation; and applying a magnetic field to the semiconductor wafer during a post exposure bake process. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, the source of patterned radiation can be an electron beam, or ion beam, for example. In one embodiment, the polymer matrix is an organic polymer matrix such as, for example, styrene, acrylate, or methacrylate. In one embodiment, the catalytic species can be, for example, an acid, a base, or an oxidizing agent.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 25, 2008
    Inventors: Uzodinma Okoroanyanwu, Harry J. Levinson, Ryoung Han Kim, Thomas Wallow
  • Publication number: 20080198453
    Abstract: According to one exemplary embodiment, an optical polarizer positioned before a light source for use in semiconductor wafer lithography includes an array of aligned nanotubes. The array of aligned nanotubes cause light emitted from the light source and incident on the array of aligned nanotubes to be converted into polarized light for use in the semiconductor wafer lithography. The amount of polarization can be controlled by a voltage source coupled to the array of aligned nanotubes. Chromogenic material of a light filtering layer can vary the wavelength of the polarized light transmitted through the array of aligned nanotubes.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Inventors: Bruno M. LaFontaine, Ryoung-Han Kim, Harry J. Levinson, Uzodinma Okoroanyanwu
  • Publication number: 20080194046
    Abstract: According to one exemplary embodiment, a method for determining a power spectral density of an edge of at least one patterned feature situated over a semiconductor wafer includes measuring the edge of the at least one patterned feature at a number of points on the edge. The method further includes determining an autoregressive estimation of the edge of the at least one patterned feature using measured data corresponding to a number of points on the edge. The method further includes determining a power spectral density of the edge using autoregressive coefficients from the autoregressive estimation. The method further includes utilizing the power spectral density to characterize line edge roughness of the at least one patterned feature in a frequency domain.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 14, 2008
    Inventors: Yuansheng Ma, Harry J. Levinson, Thomas Wallow
  • Publication number: 20080124820
    Abstract: One exemplary embodiment is a method for detecting existence of an undesirable particle between a planar lithographic object, such as a semiconductor wafer or a lithographic mask, and a chuck during semiconductor fabrication. The exemplary method in this embodiment includes placing the planar lithographic object, such as the semiconductor wafer, over the chuck. The method further includes measuring a change in at least one electrical characteristic formed by and between the chuck and the planar lithographic object, such as measuring a change in capacitance between the chuck and semiconductor wafer, caused by the undesirable particle.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 29, 2008
    Inventors: Harry J. Levinson, Obert Reeves Wood
  • Patent number: 7315033
    Abstract: Disclosed are a method of reducing biological contamination in an immersion lithography system and an immersion lithography system configured to reduce biological contamination. A reflecting element and/or an irradiating element is used to direct radiation to kill biological contaminates present with respect to at least one of i) a volume adjacent a final element of the projection system or ii) an immersion medium supply device disposed adjacent the final element.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: January 1, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Adam R. Pawloski, Harry J. Levinson, Jongwook Kye
  • Publication number: 20070281248
    Abstract: An integrated circuit fabrication process as described herein employs a photoresist stabilization step where patterned photoresist material is exposed to radiation having a wavelength that promotes cross-linking in the shallow surfaces of the patterned photoresist features. The patterned photoresist material is highly absorptive of the stabilizing radiation, which results in the surface cross-linking and modification of the outer surfaces of the patterned photoresist material. This modified “shell” is immune to photoresist developer, photoresist solvents, intense ion implantation, and intense etchants. The shell also enables for the resist not to deform when baked at a temperature above its glass transition temperature. For example, the photoresist stabilization technique can be used in a double exposure process such that a patterned photoresist layer remains intact during a subsequent lithographic sub-process.
    Type: Application
    Filed: May 31, 2006
    Publication date: December 6, 2007
    Inventors: Harry J. Levinson, Ryoung-han Kim, Thomas I. Wallow
  • Patent number: 7061578
    Abstract: A method of monitoring an immersion lithography system in which a wafer can be immersed in a liquid immersion medium for exposure by an exposure pattern. The method detects the presence of a foreign body in the immersion medium to thereby determine if the immersion medium in a state that is acceptable for exposing the wafer with the exposure pattern. Also disclosed is a monitoring and control system for an immersion lithography system.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: June 13, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Harry J. Levinson
  • Patent number: 7014966
    Abstract: A method of operating an immersion lithography system, including steps of immersing at least a portion of a wafer to be exposed in an immersion medium, wherein the immersion medium comprises at least one bubble; directing an ultrasonic wave through at least a portion of the immersion medium to disrupt and/or dissipate the at least one bubble; and exposing the wafer with an exposure pattern by passing electromagnetic radiation through the immersion medium subsequent to the directing. Also disclosed is a monitoring and control system for an immersion lithography system.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: March 21, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Adam R. Pawloski, Amr Y. Abdo, Gilles R. Amblard, Bruno M. LaFontaine, Ivan Lalovic, Harry J. Levinson, Jeffrey A. Schefske, Cyrus E. Tabery, Frank Tsai
  • Patent number: 7006209
    Abstract: A method of monitoring an immersion lithography system in which a wafer can be immersed in a liquid immersion medium. The method detects an index of refraction of the immersion medium in a volume of the immersion medium through which an exposure pattern is configured to traverse and determines if the index of refraction is acceptable for exposing the wafer with the exposure pattern. Also disclosed is a monitoring and control system for an immersion lithography system.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: February 28, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Harry J. Levinson
  • Patent number: 6984475
    Abstract: An extreme ultraviolet (EUV) lithography mask blank. The mask blank can include a substrate having a reflector film disposed over an upper surface of the substrate. The mask blank is provided with structural features to facilitate indirect grounding of the reflector film.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: January 10, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Bruno M. LaFontaine, Ivan Lalovic, Adam R. Pawloski
  • Patent number: 6740566
    Abstract: In one embodiment, the present invention relates to a method of forming a shallow trench, involving the steps of providing a semiconductor substrate comprising a barrier oxide layer over at the semiconductor substrate and a nitride layer over the barrier oxide layer; depositing an ultra-thin photoresist over the nitride layer, the ultra-thin photoresist having a thickness of about 2,000 Å or less; patterning the ultra-thin photoresist to expose a portion of the nitride layer and to define a pattern for the shallow trench; etching the exposed portion of the nitride layer with an etchant having a nitride:photoresist selectivity of at least about 10:1 to expose a portion of the barrier oxide layer; etching the exposed portion of the barrier oxide layer to expose a portion of the semiconductor substrate; and etching the exposed portion of the semiconductor substrate to provide the shallow trench.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: May 25, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher F. Lyons, Scott A. Bell, Harry J. Levinson, Khanh B. Nguyen, Fei Wang, Chih Yuh Yang
  • Patent number: 6716571
    Abstract: A process for forming sub-lithographic features in an integrated circuit is disclosed herein. The process includes modifying a photoresist layer after patterning and development but before it is utilized to pattern the underlying layers. The modified photoresist layer has different etch rates in the vertical and horizontal directions. The modified photoresist layer is trimmed with a plasma etch. A feature included in the trimmed photoresist layer has a sub-lithographic lateral dimension.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: April 6, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Calvin T. Gabriel, Harry J. Levinson, Uzodinma Okoroanyanwu
  • Patent number: 6645679
    Abstract: An attenuated phase shift mask utilizes a multilayer which has been locally modified. Heat treatment or e-beam treatment can locally modify the multilayer to provide different reflective characteristics. The attenuated phase shift mask can be utilized in EUV applications.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: November 11, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bruno M. La Fontaine, Calvin T. Gabriel, Harry J. Levinson, Kouros Ghandehari
  • Patent number: 6627355
    Abstract: The present invention provides a method of and system for reducing the absorption of light by opaque material in a photomask. The method includes providing a photomask substrate, and applying an opaque material to one side of the photomask substrate. The interface between the opaque material and photomask substrate reflects at least 80 percent of the light through the photomask.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: September 30, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Fan Piao, Christopher A. Spence
  • Patent number: 6623893
    Abstract: A pellicle utilizes a film attached to a barrier layer above a substrate. The film is relatively transparent to radiation in the EUV range. The substrate and barrier layer are coupled to a periphery of the film and is exclusive of the center portion of the film. The pellicle can be manufactured by growing a relatively transparent film on a barrier layer that is grown on a substrate. The substrate and barrier layer are etched to expose a portion of the relatively transparent film.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 23, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Christopher F. Lyons
  • Patent number: 6608321
    Abstract: An inspection tool or inspection system can be utilized to determine whether the appropriate pattern is on a reticle. The reticle can be associated with EUV lithographic tools. The system utilizes at least two wavelengths of light. The light is directed to the reticle at the at least two wavelengths of light and detected by a detector. The image associated with the first wavelength is subtracted from or otherwise processed with respect to the image associated with the second wavelength to improve contrast ratio.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: August 19, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bruno M. La Fontaine, Harry J. Levinson, Jeffrey A. Schefske
  • Patent number: 6593037
    Abstract: A reflective mask or reticle configured to reduce reflections from an absorptive layer during lithography at a wavelength shorter than in a deep ultraviolet (DUV) range is disclosed herein. The reflective mask or reticle is configured to generate additional reflections which have a desirable phase difference with respect to the reflections from the absorptive layer. The additional reflections reduce or eliminate the reflections from the absorptive layer by destructive interference.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Calvin T. Gabriel, Bruno M. LaFontaine, Harry J. Levinson