Abstract: The present invention features a method of noise reduction in both packaging structures and circuit boards, as well as articles of manufacture that result from this method. Both the method and the articles weaken and effectively reduce undesirable noise signals that propagate as waves to and from the perimeter of circuit boards. The method of the invention adds absorbent materials in various structural configurations to strategic areas about the exterior and interior of the circuit boards. In order to absorb noise signals, these added materials are placed around lines and vias of the circuit boards, as well as at their ends and perimeters. Non-absorbent materials must contiguously surround the lines and vias; otherwise, absorbent material will absorb desired signals, as well as noise. The method of this invention tries to match the dielectric constant of the added, absorbent materials with the dielectric constant of the non-absorbent, dielectric materials found on the circuit board.

Abstract: A hybrid superconducting-semiconducting field effect transistor-like circuit element comprised of a superconducting field effect transistor and a closely associated cryogenic semiconductor inverter for providing signal gain is described. The hybrid circuit functions nearly as an ideal pass gate in cryogenic cross-bar applications.

Abstract: Superconducting-semiconducting hybrid memories are disclosed. These superconducting-semiconducting hybrid memories utilize semiconductor circuits to store information, and either superconducting or semiconducting or combinations of superconducting and semiconducting circuits, with at least some superconducting circuitry used, to write and read information. The state of memory cells in the hybrid memories is determined by utilizing superconductor current sensing schemes to detect currents in the bit-line, thereby avoiding any bit-line charging delays and other problems associated with purely semiconductor memories. Additional features of the superconducting-semiconducting hybrid memories include wide margins, dense packing of memory cells, low power dissipation and fast access times. Interface curcuitry for converting superconducting signals to signals compatible with semiconductor circuits and for converting semiconductor signals to signals compatible with superconducting circuits is also disclosed.

Abstract: A hybrid superconducting-semiconducting field effect transistor-like circuit element comprised of a superconducting field effect transistor and a closely associated cryogenic semiconductor inverter for providing signal gain is described. The hybrid circuit functions as a nearly ideal pass gate in cryogenic applications.

Abstract: A high density electrical interconnect having a plurality of metallic conductors supported from metallic pillars which are electrically isolated from the ground plane by openings. The interconnect can be fabricated using a temporary support dielectric, which may be removed after completion to provide an air dielectric or be replaced with a more suitable permanent dielectric. The removal of the temporary support allows the conductors to be coated with protective layers or with a layer of a higher conductivity.

Abstract: A planarization method of fabricating a layer of metal conductors embedded in a dielectric level. A coating of aluminum is anodized from the top but leaving a thickness of unanodized aluminum on the bottom. The top is masked and etched to provide a predetermined bare area which is etched out down to the unanodized aluminum. A metal is plated to the unanodized aluminum equal to the thickness of the unexposed anodic aluminum. The mask is removed and the unanodized aluminum is anodized. Therefore, the layer of metal and the dielectric anodic aluminum are planarized. Another anodizable metal may be used as an undercoat layer for completing the anodizing of the aluminum.

Abstract: In superconductive integrated circuit a semiconductor substrate is used in combination with normal resistors formed by degenerate doping of the substrate in selected regions. Doping is preferably performed by planar diffusion or ion implantation. Application of the invention to fabrication of a Josephson Atto-Weber gate by forming a normal resistor intermediate the junctions is also disclosed.

Abstract: A superconductive tunnel junction device comprises first and second superconductive electrodes with a barrier disposed therebetween where the first superconductive electrode and the barrier are formed without interruption in the same vacuum system pump down and with the first superconductive electrode subjected to sputter etching in an argon plasma before the deposition of the barrier for improving the characteristics of the device.

Abstract: A superconductive junction device for fabricating Josephson integrated circuits is useful for replacing deposited thin-film resistors and for short-circuit device interconnections. Derived by "poisoning" a superconductive electrode or altering the barrier of a tunnel junction, the device displays controllable resistive properties at normal superconducting transition temperatures at substantial savings in the space occupied. Methods of fabricating the device using the selective niobium anodization process and ion implantation process are disclosed. When both upper and lower superconductive electrodes are poisoned, the device has linear properties whose resistance is identical to the normal resistance of unpoisoned junctions. Superconducting short circuits are readily obtained by oxygen ion implantation in thin film niobium electrodes.

Abstract: A superconducting tunnel junction device having superconductive electrodes has a non-homogeneous barrier layer of amorphous semiconductive material, wherein when the central region is deposited in the presence of a gaseous atmosphere containing hydrogen there obtains a reduced density of localized states in the central region of the barrier so as to minimize leakage currents, resulting in improved current-voltage characteristics approximating an ideal tunnel junction device. The low leakage currents improve margins of Josephson logic circuits over tunneling barriers using uniformly deposited hydrogenated silicon with niobium electrodes, and increase the sensitivity of S-I-S microwave and millimeter wave length detectors and mixers. In a preferred embodiment, superconductive electrodes of niobium are conjoined with a tri-layer barrier using pure silicon adjoining the electrodes and a core of hydrogenated amorphous silicon. V.sub.

Abstract: An optical temperature sensor and method of manufacture therefor in which the intensity of light reflected from a first dielectric interface or from first and second dielectric interfaces, wherein one of the dielectrics has a temperature dependent index of refraction is measured. The intensity of light refleted from such dielectric interfaces will vary depending on the index of refraction which in turn is temperature dependent, thus providing a temperature dependent light signal.

Abstract: A Josephson tunnel junction device having niobium nitride superconductive electrodes includes a polycrystalline semiconductor tunneling barrier therebetween comprised of silicon, germanium, or an alloy thereof preferably deposited on the lower superconductive electrodes by vapor deposition. The barrier thickness of the junction is controlled by precision doping of the semiconductor material. The active junction is defined after the interfaces between the barrier material and the two superconductor lines are formed, retaining those active interfaces in fully unpolluted character.

Abstract: The disclosed SQUID (superconducting Quantum Interference Device) comprises two superposed superconductive layers with an insulating layer therebetween. A plurality of holes through the insulating layer filled with superconductive material form weak-links between the superconductive layers. One or more control lines superposed with respect to the superconductive layers provide magnetic flux through the area between the weak-links to control the zero voltage supercurrent flowing through the weak-links from one of the superconductive layers to the other thereby providing the switching function for Josephson superconductive circuits.

Abstract: A Josephson tunnel junction device having niobium nitride superconductive electrodes includes a polycrystalline semiconductor tunnelling barrier therebetween comprised of silicon, germanium or an alloy thereof preferably deposited on the lower superconductive electrodes by chemical vapor deposition. The barrier height of the junction is precisely controlled by precision doping of the semiconductor material.

Abstract: The disclosed SQUID (Superconducting Quantum Interference Device) comprises two superposed superconductive layers with an insulating layer therebetween. A plurality of holes through the insulating layer filled with non-superconductive material form weak-links between the superconductive layers by the superconductive proximity effect. One or more control lines superposed with respect to the superconductive layers provide magnetic flux through the area between the weak-links to control the zero voltage supercurrent flowing through the weak-links from one of the superconductive layers to the other thereby providing the switching function for Josephson superconductive circuits. The non-superconductive material forming the weak-links in the holes provides, inter alia, favorable impedance characteristics for the device.

Abstract: A Josephson tunnel junction device having niobium superconductive electrodes with an amorphous hydrogenated semiconductor tunnelling barrier therebetween comprised of silicon or germanium or an alloy thereof supports an unusually high critical current density. Barrier dopants provide a further increase in the critical current density. The barrier is deposited by rf-sputtering in an atmosphere containing hydrogen.

Abstract: Semiconductor storage switching circuits and integrated circuit storage array devices that employ them are characterized by the fact that each individual cell of the storage array requires only a single active device, each such active device consisting of a three terminal, controlled-inversion device of metal, non-linear resistor, and semiconductor layers, the active device having controllable switching characteristics through the use of silicon dioxide, polycrystalline silicon, or nitrides of silicon in its non-linear resistive layer. Control circuits associated with the memory arrays make possible the unique selection of any one predetermined cell to write, erase, or read its content. Grounded base and grounded emitter forms of the storage devices are provided, as well as random access memory devices.

Abstract: Multi-terminal controlled-inversion semiconductor devices are presented having current or voltage controllable switching characteristics provided through use of a non-linear resistive layer and by the control of the rate of injection of carriers with respect to their rate of removal by conduction through the non-linear layer.