Patents by Inventor Harry Q. Lee

Harry Q. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080146120
    Abstract: A method of determining a physical property of a substrate includes recording a first spectrum obtained from a substrate, the first spectrum being obtained during a polishing process that alters a physical property of the substrate. The method includes identifying, in a database, at least one of several previously recorded spectra that is similar to the recorded first spectrum. Each of the spectra in the database has a physical property value associated therewith. The method includes generating a signal indicating that a first value of the physical property is associated with the first spectrum, the first value being determined using the physical property value associated with the identified previously recorded spectrum in the database. A system for determining a physical property of a substrate includes a polishing machine, an endpoint determining module, and a database.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 19, 2008
    Inventors: Abraham Ravid, Boguslaw A. Swedek, Jeffrey Drue David, Jun Qian, Ingemar Carlsson, Dominic J. Benvegnu, Harry Q. Lee, Lakshmanan Karuppiah
  • Publication number: 20080130000
    Abstract: Methods of subtracting the copper contribution to spectra obtained from a substrate during chemical mechanical polishing are described.
    Type: Application
    Filed: October 8, 2007
    Publication date: June 5, 2008
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Dominic J. Benvegnu, Jeffrey Drue David, Boguslaw A. Swedek, Jimin Zhang, Harry Q. Lee
  • Patent number: 7255632
    Abstract: A polishing method usable in an apparatus including a rotatable member rotatable about a first axis, at least one substrate head assembly supported on said rotatable member, and at least two polishing surfaces arranged below said rotatable member at respective angular positions about said first axis is described. In one implementation, a substrate can be mounted onto a first one of said at least one substrate head assembly. The rotatable member can be rotated to a position so that the substrate overlies a selected one of the polishing surfaces. The substrate can be engaged with said selected polishing surface and relative linear movement imparted between the selected polishing surface and the first substrate head assembly, while the substrate is engaged with the selected polishing surface.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: August 14, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
  • Patent number: 7238090
    Abstract: Methods and apparatus for chemical mechanical polishing are described. In one embodiment, an apparatus includes a table top and a transfer station and multiple polishing stations are mounted on the table top. The apparatus further includes multiple washing stations, where each washing station is located between either two polishing stations or between a polishing station and a transfer station. Multiple carrier heads are supported by a support member that is rotatable about an axis. The transfer station and the multiple polishing stations are arranged at approximately equal angular intervals about the axis.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: July 3, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
  • Patent number: 7175505
    Abstract: Aspects of the present invention include a method and an apparatus that may be utilized to adjust processing times in a substrate processing system. In one embodiment of the present invention, a pre-processing thickness measurement of a substrate while the substrate is in one of the polishing stations is taken. Then the substrate is processed in the polishing system for a predetermined processing time. A post-processing thickness measurement is taken while the substrate is in one of the polishing stations. A removal rate is calculated based on the pre-processing and the post-processing measurements and the predetermined processing time. A processing time is adjusted for one or more of the polishing stations based on the removal rate for use in subsequent processing of a production substrate.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 13, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Sen-Hou Ko, Harry Q. Lee, Wei-Yung Hsu
  • Patent number: 7097544
    Abstract: An apparatus and associated methods for polishing semiconductor wafers and other workpieces that includes polishing surfaces located at multiple polishing stations. Multiple wafer heads, preferably at least one greater in number than the number of polishing stations, can be loaded with individual wafers. The wafer heads are suspended from a rotatable support, which provides circumferential positioning of the heads relative to the polishing surfaces, and the wafer heads move linearly with respect to the polishing surface, thus providing relative linear motion between the wafer and the polishing station. A load/unload station may be located at a position symmetric with the polishing surfaces. The rotatable support can simultaneously position one of the heads over the load/unload station while the remaining heads are located over polishing stations for wafer polishing so that loading and unloading of wafers can be performed concurrently with wafer polishing.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: August 29, 2006
    Assignee: Applied Materials Inc.
    Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
  • Patent number: 6126517
    Abstract: An apparatus and associated methods for polishing semiconductor wafers and other workpieces that includes a polishing surfaces, such as pads mounted on respective platens, located at multiple polishing stations. Multiple wafer heads, preferably at least one greater in number than the number of polishing stations, can be loaded with individual wafers. The wafer heads are suspended from a rotatable support, which provides circumferential positioning of the heads relative to the polishing surfaces, and the wafer heads move linearly with respect to the polishing surface, for example oscillate radially within the rotatable support. A load/unload station may be located at a position symmetric with the polishing surfaces. The rotatable support can simultaneously position one of the heads over the load/unload station while the remaining heads are located over polishing stations for wafer polishing so that loading and unloading of wafers can be performed concurrently with wafer polishing.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: October 3, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
  • Patent number: 6080046
    Abstract: A wafer storage and wafer transfer system adjunct to a multi-station chemical mechanical polishing system. Multiple wafers are brought to the system stored in a cassette. A claw member attached to an overhead arm picks up the cassette and deposits it in a water-filled tub next to the polishing system, thereby submerging the wafers in the water with a generally vertical orientation. A blade member attached to the same arm has a recess formed in its surface connected to a vacuum generator powered by positive fluid pressure to thereby selectively apply a vacuum to the recess to vacuum chuck a wafer. The blade member vacuum chucks a wafer under the water, picks it out of the water, and deposits it on a pedestal in polishing system. One of several wafer heads on a rotating carousel picks up the wafer from the pedestal and carries it to one or more of the polishing stations for polishing. After completion of polishing, the wafer head redeposits the wafer on the pedestal.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: June 27, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Norm Shendon, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee, Robert D. Tolles, Sasson Somekh
  • Patent number: 5804507
    Abstract: An apparatus for polishing semiconductor wafers and other workpieces that includes a polishing pads mounted on respective platens at multiple polishing stations. Multiple wafer heads, at least one greater in number than the number of polishing stations, can be loaded with individual wafers. The wafer heads are suspended from a carousel, which provides circumferential positioning of the heads relative to the polishing pads, and the wafer heads oscillate radially as supported by the carousel to sweep linearly across the respective pads in radial directions with respect to the rotatable carousel. Each polishing station includes a pad conditioner to recondition the polishing pad so that it retains a high polishing rate. Washing stations may be disposed between polishing stations and between the polishing stations and a transfer and washing station to wash the wafer as the carousel moves. A transfer and washing station is disposed similarly to the polishing pads.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: September 8, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Ilya Perlov, Eugene Gantvarg, Harry Q. Lee, Sasson Somekh, Robert D. Tolles
  • Patent number: 5795215
    Abstract: A process using a retaining ring assembly of a carrier head to precompress a polishing pad to reduce or minimize the edge effect in a chemical mechanical polishing process.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: August 18, 1998
    Assignee: Applied Materials, Inc.
    Inventors: William L. Guthrie, Tsungnan Cheng, Sen-Hou Ko, Harry Q. Lee, Michael T. Sherwood, Norm Shendon
  • Patent number: 5738574
    Abstract: An apparatus for polishing semiconductor wafers and other workpieces that includes polishing pads mounted on respective platens at multiple polishing stations. Multiple wafer heads, at least one greater in number than the number of polishing stations, can be loaded with individual wafers. The wafer heads are suspended from a carousel, which provides circumferential positioning of the heads relative to the polishing pads, and the wafer heads oscillate radially as supported by the carousel to sweep linearly across the respective pads in radial directions with respect to the rotatable carousel. Each polishing station includes a pad conditioner to recondition the polishing pad so that it retains a high polishing rate. Washing stations may be disposed between polishing stations and between the polishing stations and a transfer and washing station to wash the wafer as the carousel moves. A transfer and washing station is disposed similarly to the polishing pads.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: April 14, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Robert D. Tolles, Norm Shendon, Sasson Somekh, Ilya Perlov, Eugene Gantvarg, Harry Q. Lee
  • Patent number: 5681215
    Abstract: A carrier uses multiple bellows to form two pressure chambers between the housing and carrier base and retaining ring assembly. By pressurizing the first chamber, an even load can be applied across the substrate. By pressurizing the second chamber, the retaining ring can pressed against the polishing pad. The bellows allow the carrier base to pivot with respect to the housing, but the downward force is evenly applied to the substrate through the first pressure chamber. Torque is transferred from the carrier housing to the carrier base through the bellows.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: October 28, 1997
    Assignee: Applied Materials, Inc.
    Inventors: Michael T. Sherwood, Harry Q. Lee, Norm Shendon, Semyon Spektor
  • Patent number: 5599423
    Abstract: Apparatus and concomitant method for simulating a chemical mechanical polishing (CMP) system containing a polishing pad, a chuck for supporting a substrate, a positioner for positioning the polishing pad with respect to the substrate, a chuck rotator for rotating the chuck, and a polishing pad rotator for rotating the polishing pad. The CMP system simulation method comprises: defining polishing pad and substrate parameters; defining simulation parameters; determining, in response to said polishing pad, substrate and simulation parameters, a polishing result; and displaying the polishing result. Additionally, the simulation optimizes selected parameters to achieve a specified polishing non-uniformity across a substrate. Also, the simulation and optimization routines are interfaced to CMP system hardware to optimally control a substrate polishing process to achieve predetermined substrate polishing non-uniformity.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: February 4, 1997
    Assignee: Applied Materials, Inc.
    Inventors: Norman W. Parker, Robert D. Tolles, Harry Q. Lee
  • Patent number: 5497007
    Abstract: An automated method for establishing a wafer coordinate system for a wafer characterization system. Specifically, under computer control, a high-magnification imaging system images a wafer at a low, initial magnification level. From this imaging process, the method first determines the location of the center of the semiconductor wafer mounted within the imaging system and then determines the wafer orientation therein. The method then repeats the imaging process at increased magnification levels until a desired degree of magnification is used to accurately define the location of the wafer center and the wafer orientation. Together the wafer center and orientation define a wafer coordinate system. This wafer coordinate system is then related to the coordinate system of the imaging system by a coordinate system transformation. As such, once the coordinate systems are related, the imaging system can quickly and accurately determine any point on a wafer.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: March 5, 1996
    Assignee: Applied Materials, Inc.
    Inventors: Yuri S. Uritsky, Harry Q. Lee
  • Patent number: 5422724
    Abstract: A method for reducing targeting errors encountered when trying to locate contaminant particles in a high-magnification imaging device, based on estimates of the particle positions obtained from a scanning device. The method of the invention includes scanning a semiconductor wafer in a scanning device, then preferably moving the wafer to a different orientation, and scanning the wafer again, to obtain at least two sets of particle coordinates that may differ slightly because of uncertainties in the scanning process. The multiple sets of coordinates are averaged to reduce the targeting errors, but only after transforming the coordinates to a common coordinate system. The transformation step includes computing transformation parameters for each possible pair of particles detected in at least two scans, averaging the results, and then transforming all of the particle coordinates to the common coordinate system.
    Type: Grant
    Filed: August 31, 1993
    Date of Patent: June 6, 1995
    Assignee: Applied Materials, Inc.
    Inventors: Patrick D. Kinney, Yuri S. Uritsky, Harry Q. Lee
  • Patent number: 5381004
    Abstract: A method for reducing targeting errors that arise when trying to locate contaminant particles on a notched semiconductor wafer using a high-magnification imaging device, based on estimates of wafer feature positions obtained from a scanning device. The present invention scans a notched semiconductor wafer with a scanning device to obtain scanning device coordinates for the positions of: (i) the wafer center; (ii) the wafer notch; and (iii) contaminant particles on the wafer. Next, the present invention finds the wafer notch and wafer center with an imaging device and obtains their estimated imaging device coordinates. Subsequently, the present invention calculates estimated transformation parameters for a coordinate transformation between the coordinate systems of the scanning device and the imaging device based on the scamping device coordinates and the estimated imaging device coordinates of the wafer notch and the wafer center.
    Type: Grant
    Filed: August 31, 1993
    Date of Patent: January 10, 1995
    Assignee: Applied Materials, Inc.
    Inventors: Yuri S. Uritsky, Harry Q. Lee
  • Patent number: 5267017
    Abstract: A method for reducing targeting errors encountered when trying to locate contaminant particles in a high-magnification imaging device, based on estimates of the particle positions obtained from a scanning device. The method of the invention uses three techniques separately and in combination. The first technique includes selecting at least three reference particles, to provide multiple unique pairs of reference particles for computation of an averaged set of coordinate transformation parameters, used to transform particle position coordinates from the coordinate system of the scanning device to the coordinate system of the imaging device. The averaged transformation parameters result in much smaller targeting errors between the estimated and actual positions of the particles. The targeting errors are further reduced by the use of multiple scans of the scanning device.
    Type: Grant
    Filed: May 20, 1992
    Date of Patent: November 30, 1993
    Assignee: Applied Materials, Inc.
    Inventors: Yuri S. Uritsky, Harry Q. Lee, Patrick D. Kinney, Kang-Ho Ahn