Abstract: A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface, wherein the volatile memory area is connected to the interface to be written thereto by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.

Abstract: A circuit and a method of examining in a microprocessor a section of a first range of values and a second range of values each comprising a lower boundary value and an upper boundary value is disclosed. The method includes examining whether a value of the first range of values is equal to or greater than the lower boundary value of the second range of values, and examining whether the lower boundary value of the first range of values is smaller than or equal to the upper boundary value of the second range of values.

Abstract: A real-time trigger apparatus and method for using the same including a trigger logic block configured to output a trigger signal, and at least one reference register configured to store a traced value calculated by the trigger logic block, wherein the trigger signal is based at least in part on the traced value.

Abstract: A system and method for integrated circuit emulation. One embodiment provides a system for in-circuit emulation of an integrated circuit device with program-controlled components. The system includes an integrated circuit device with program-controlled components used in a system for normal operation. The integrated circuit device having at least one program-controlled emulation unit emulating at least one of the program-controlled components of the integrated circuit device, and at least one statistics memory for storing statistical data of the program-controlled emulation unit during emulation.

Abstract: A system and method for tracing instruction pointers and data access is disclosed. In one embodiment the system includes a plurality of trace units including at least one first trace unit configured to perform an instruction pointer trace, and at least one second trace unit configured to perform a data trace. A multiplexer is connected between the plurality of processor cores and the plurality of trace units.

Abstract: An electronic controlling device and method is disclosed. One embodiment provides at least one module performing specific functions within one of a plurality of module modes on reception of a corresponding module mode request. A system control unit is provided to operate the at least module in one of a plurality of module modes by distributing a corresponding system mode request. The at least one module is adapted to translate the distributed system mode request to a module mode request which is configurable.

Abstract: A processor generates a signature value indicating a sequence of executed instructions, and the signature value is compared to signature values calculated for two or more possible sequences of executed instructions to determine which instruction sequence was executed. The signature is generated via a signature generator during program execution, and is provided external to the processor via a signature message.

Abstract: A program-controlled unit has debug resources for monitoring the operations proceeding within the program-controlled unit. The program-controlled unit described is distinguished by the fact that the debug resources contain a CPU, and/or that a portion of the debug resources is provided for monitoring the operations proceeding within the remainder of the debug resources. Debug resources constructed in this way make it possible for errors occurring in program-controlled units to be localized and eliminated rapidly and simply under all circumstances.

Abstract: A circuit and a method of examining in a microprocessor a section of a first range of values and a second range of values each comprising a lower boundary value and an upper boundary value is disclosed. The method includes examining whether a value of the first range of values is equal to or greater than the lower boundary value of the second range of values, and examining whether the lower boundary value of the first range of values is smaller than or equal to the upper boundary value of the second range of values.

Abstract: An integrated circuit having a subordinate test interface and method for transmitting digital data is disclosed. The integrated circuit includes at least one test interface that is adapted to write and read data in and from a data memory, the at least one test interface includes, for transmitting and receiving data of different content categories, one signal line each for every content category. The integrated circuit further includes an interface module for receiving and transmitting data, and that the interface module is, via the signal lines, connected with the test interface for transmitting the data of the different content categories.

Abstract: A programme-controlled unit comprises a crossbar with a multiplicity of ports, a multiplicity of devices which are connected to the ports of the crossbar and can exchange data via the crossbar, and debug resources for detecting the events and states occurring in the programme-controlled unit. The programme-controlled unit described can be characterized by the fact that the ports of the crossbar comprise a diagnostic port, that the addresses, data and/or control signals which are transmitted between two other ports of the crossbar are additionally also supplied to the diagnostic port, and that the debug resources are connected to the diagnostic port of the crossbar.

Abstract: A semiconductor device system and a method for modifying a semiconductor device is disclosed. In one embodiment, a function provided by a circuit positioned on the semiconductor device is replaced, modified, and/or supplemented by a function provided by a circuit positioned on a further semiconductor device.

Abstract: A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface is suggested, wherein the memory area is adapted to be written by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.

Abstract: A system and method for signal transmission, a signal modulation and a signal demodulation device, and a method for signal transmission are disclosed. One embodiment includes transmitting a first pulse signal via a first line; and transmitting a second pulse signal complementary to the first pulse signal via a second line, wherein the point in time of the transmitting of the second signal relative to the point in time of the transmitting of the first signal is varied as a function of the respective digital data to be transmitted.

Abstract: One aspect of the invention relates to a semiconductor device test system, interface means for use with a semiconductor device test method, and a semiconductor device test method, wherein, in a fist mode of an interface means, in reaction to test signals corresponding to a test standard, for example, a JTAG test standard, and received by said interface means from a test device, said interface means outputs signals corresponding to the test standard to a semiconductor device to be tested, and wherein, in a second mode of said interface means, in reaction to test signals corresponding to the test standard and received by said interface means from a test device, said interface means outputs signals that do not correspond to the test standard to a semiconductor device to be tested.

Abstract: A semiconductor chip has a multiplicity of flipflops which can be connected up to form one or more shift registers for the purpose of testing the semiconductor chip, and having a JTAG test access port based on IEEE 1149.1 which can be used to put the semiconductor chip into a test mode in which the flipflops are connected up to form one or more shift registers. The semiconductor chip described is distinguished in that it is designed such that the one or more shift registers can have information written to and read from it/them via the JTAG test access port.

Abstract: A programme-controlled unit comprises a crossbar with a multiplicity of ports, a multiplicity of devices which are connected to the ports of the crossbar and can exchange data via the crossbar, and debug resources for detecting the events and states occurring in the programme-controlled unit. The programme-controlled unit described can be characterized by the fact that the ports of the crossbar comprise a diagnostic port, that the addresses, data and/or control signals which are transmitted between two other ports of the crossbar are additionally also supplied to the diagnostic port, and that the debug resources are connected to the diagnostic port of the crossbar.

Abstract: Method of determining information about the processes which run in a program-controlled unit during the execution of a program by the program-controlled unit A description is given of a method of determining information about the processes which run in a program-controlled unit during the execution of a program by the program-controlled unit. The method described is distinguished by the fact that identical items of individual information about processes of the same type are combined to form a single item of overall information. As a result, the desired information about the processes of interest can be procured with considerably less expenditure than was the case hitherto.

Abstract: At least one centralized transmission facility is connected via the power supply lines of the power supply network to the decentralized transmission facilities with a decentralized repeater function being appropriately positioned in the power supply network in the event of there being insufficient transmission range of the centralized to the decentralized transmission facilities. According to the invention, part of the decentralized transmission facilities are additionally fitted with repeater functions in such a way that they can be configured via the centralized transmission facility as a decentralized transmission facility and/or as a decentralized transmission facility with a repeater function. In this way, if centralized transmission facilities cannot be reached, an alternative path is determined and the transmission system is automatically reconfigured.

Abstract: A control device is provided for observing and/or changing internal states and processes of a controllable unit from outside the unit. The control device is a component of a network including a server and two or more clients. The clients are system components for initiating or carrying out the observation, change and/or evaluation of the internal states and processes of the programmable unit. Whenever the clients access the programmable unit in order to carry out the necessary tasks they are responsible for, they transmit to the server a request that specifies what action is to be initiated by the access. The server defines how the programmable unit must be accessed in order to carry out the actions specified by the requests, and carries out the corresponding access to the programmable unit.