Patents by Inventor Harry Siegel

Harry Siegel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210146969
    Abstract: Described herein is an electrically and thermally conductive thermoplastic polyurethane. The conductive thermoplastic polyurethane is formed in an injection-molded process from vapor grown carbon nanofibers and a modified form of thermoplastic polyurethane (TPU). The polymer pad encompassing the injection-molded insert may be used to replace an existing railcar adapter pad.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 20, 2021
    Inventors: Constantine Tarawneh, Robert Jones, Anthony Villarreal, Harry Siegel
  • Publication number: 20060261450
    Abstract: A method for providing a leadframeless package structure is provided. The method includes providing a temporary carrier. The temporary carrier is coupled to a metal foil layer with a temporary adhesive layer. An integrated circuit chip is coupled to the metal foil layer. The temporary adhesive layer and the temporary carrier are removed to form the leadframeless package structure after molding.
    Type: Application
    Filed: April 25, 2006
    Publication date: November 23, 2006
    Applicant: STMicroelectronics, Inc.
    Inventors: Harry Siegel, Anthony Chiu
  • Publication number: 20060234423
    Abstract: A system and method is disclosed for providing a redistribution metal layer in an integrated circuit. The redistribution metal layer is formed from the last metal layer in the integrated circuit during manufacture of the integrated circuit before final passivation is applied. The last metal layer provides sites for solder bump pads used in flip chip interconnection. The redistribution metal layer can be (1) a flat layer deposited over the next to last metal layer through an opening in a dielectric layer, or (2) deposited over an array of vias connected to the next to last metal layer. Space between the solder bump pads is deposited with narrower traces for connecting active circuit areas below. A final passivation layer is deposited to ensure product reliability.
    Type: Application
    Filed: June 19, 2006
    Publication date: October 19, 2006
    Applicant: STMicroelectronics, Inc.
    Inventors: Danielle Thomas, Harry Siegel, Antonio Do Bento Vieira, Anthony Chiu
  • Publication number: 20060065961
    Abstract: An integrated lid for micro-electro-mechanical system (MEMS) devices is formed from a nitride layer deposited over a cavity containing movable parts for the device. Pillars are formed through openings within large area movable parts to support the lid over those parts. Slides are formed and moved under large etchant openings through the lid to allow the openings to be sealed by sputtering.
    Type: Application
    Filed: September 28, 2004
    Publication date: March 30, 2006
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Anthony Chiu, Harry Siegel
  • Publication number: 20050161784
    Abstract: A flat filter layer is received between upper and lower mold portions of a mold for packaging an integrated circuit sensor device, held by the mold over and in contact with the integrated circuit's sensing surface, in light compression between the sensing surface and a mold surface. The filter layer includes slots allowing passage of injected encapsulating material to cover the integrated circuit die, with overlap portions embedded in the encapsulating material, while preventing such encapsulating material from flowing onto the sensing surface. The filter layer may be, for example, a liquid and/or light filter, and may include a protective or supportive backing. The filter is thus affixed to the packaged integrated circuit sensor device, while mold residue is reduced and mold life extended.
    Type: Application
    Filed: December 6, 2004
    Publication date: July 28, 2005
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Anthony Chiu, Harry Siegel
  • Publication number: 20050001330
    Abstract: A system and method is disclosed for controlling a height and a planarity of an integrated circuit die. In one advantageous embodiment of the invention, a plurality of patterned metal stops are fabricated on an integrated circuit substrate and covered with die attach material. An integrated circuit die is inserted into the die attach material and placed into a clamping mechanism of a molding machine. The clamping mechanism (1) compresses the die into the die attach material, (2) rotates the die into parallel alignment with the substrate, and (3) pushes the die into contact with the patterned metal stops. In this manner the die height and the die planarity are precisely controlled.
    Type: Application
    Filed: July 1, 2003
    Publication date: January 6, 2005
    Applicant: STMicroelectronics, Inc.
    Inventors: Harry Siegel, Robert Bond, Tom Lao