Abstract: A current detector for connection in series with a lead carrying current to be detected, has a first branch with a plurality of series connected diodes having an anode end and a cathode end for connection to the lead, a first optocoupler light emitting diode connected in series with a resistor, connected in parallel with the first branch, the optocoupler diode being connected in the same polarity direction as the diodes in the first branch, and a first further diode connected in parallel with the first branch, in opposite polarity direction as the diodes in the first branch.

Abstract: A charging circuit for a random access memory (RAM) backup battery for supplying a first charge current from a voltage supply to the battery for as long as the voltage supply is present, comprised of a first resistance apparatus for limiting the first charge current to a low predetermined value, a bypass conducting switch connected in parallel with the first resistance apparatus, and apparatus for detecting a low voltage condition of the voltage supply and for enabling operation of the bypass conducting switch thereby bypassing the first resistance apparatus and allowing discharge current to flow from the battery to the RAM.

Abstract: One set of circumferentially juxtaposed axial surfaces of the motor magnets of a wet motor gerotor pump are separated circumferentially by a tunnel device having a central bridge portion radially just clearing the rotating armature and bounded by a pair of leg portions extending radially outwards from the central bridge portion to establish a substantially laminar flow path for the fuel. The tunnel device further spaces the armature relative to the gerotor pump cavity. A vent valve is provided in the outlet housing of the pump. A spring biases a ball valve against an imperfect seat encircling the inlet passage to provide a permanent vent bypass passage therebetween. The spring seats the ball valve against the imperfect seat to permit fuel vapors to vent through the vent outlet passage until liquid reaches the ball valve. The liquid then overcomes the bias of the spring to seat the ball against an outlet seat encircling the outlet passage to close the same.

Abstract: A wet motor pump has an armature located in a motor chamber. A shaft bushing with an internal bore rotatably supporting a shaft end portion of an armature shaft is located in an outlet housing having a bore and a bushing support for receiving the shaft bushing. The bushing, end portion of the armature shaft, the internal bore as well as an end wall passage of the outlet housing structure defines an end chamber wherein are provided an end chamber inlet passage and an end chamber outlet passage for communicating the end wall passage and the wet motor chamber. A pressure differential structure establishes a pressure differential between the end chamber inlet passage and the end chamber outlet passage, to cause a fluid flow into the end chamber inlet passage, to cool and lubricate the shaft bushing, and therefrom out of the end chamber outlet passage forming a cooling and lubrication system.

Abstract: A data processing system is disclosed in which a high-speed processor is added to a slow-speed processor and in which both processors have access to a first memory unit with the slow processor having access priority over the fast processor. In order to allow the fast processor to operate without losing data when a conflict occurs during a write operation, a second memory is coupled to the fast processor in which is stored all the data stored in the first memory. When the fast processor attempts to write into both memories but fails to write into the first memory due to a conflict with the slow processor, the data stored in the second memory is then transferred to the first memory subsequent to the completion of the access operation by the slow processor. This arrangement allows the fast processor to complete the write operation interrupted by the conflicts with the slow processor, thereby allowing the fast processor and the slow processor to have access to the same data.

Abstract: A system for editing characters stored in a memory is provided with a maximum count register and address counter means. The data at the address in memory desigated by the address counter means is removed from memory and temporarily stored in an output register. Data in an input register is then transferred to said address in memory and the data in the output register is then supplied to the input register. The address counter means is counted one count and the sequence is repeated until the count in the maximum count register is equal to the count or address in the address counter means. A delete edit function is accomplished by decrementing the address counter means and an insert edit function is accomplished by incrementing the address counter means.

Abstract: A fast acting bi-directional transmission system for use in the transfer of data from one location to another in either direction. When the transmitter at either end of the transmission line accepts the flow of data for transmission to the other end of the line, it automatically enables the transmission system, temporarily blocks the transmission of data from the other end of the transmission system and transmits data from the transmitting port to the receiving port.

Abstract: A circuit for and a method of utilizing an addressable memory as the generator of timing pulse signals is disclosed. The memory has n separate input terminals for receiving the n-bits of an n-bit address word to address one of the 2.sup.n addressable registers therein. Each register stores an n-bit data word, and, when addressed, couples the n bits of the addressed data word to a separate associated one of n separate output terminals. N separate feedback conductors couple each separate one of the n output terminals back to only a separate associated one of the n input terminals. The memory, when enabled, reads out the data word stored in a first addressed one of its registers for continuously cycling the memory through its 2.sup.n registers by using the read out data word as the address word to address the next addressed register at the next memory cycle.