Patents by Inventor Harsh Dinesh JHAVERI

Harsh Dinesh JHAVERI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087539
    Abstract: A circuit includes a first clock having a first clock output and a second clock having a second clock output. The circuit also includes a first buffer having a first buffer input, a second buffer input, and a first buffer output, the second buffer input coupled to the first clock output and a second buffer having a third buffer input, a fourth buffer input, and a second buffer output, the third buffer input coupled to the first buffer output and the fourth buffer input coupled to the second clock output. Additionally, the circuit includes a first element of data memory having a first data input and a first data output, the first data input coupled to the first buffer output and a second element of data memory having a second data input and a second data output, the second data input coupled to the second buffer output.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Stephen Phillip Savage, Harsh Dinesh Jhaveri
  • Patent number: 11862117
    Abstract: Method and apparatus for matched buffer decompression. In some examples, a circuit comprising a first data element, a second data element, a first buffer coupled to the first data element, a second buffer coupled to the second data element, compression override logic circuits coupled to the first data element and the second data element, and a parallel register coupled to the compression override logic circuits.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stephen Phillip Savage, Harsh Dinesh Jhaveri
  • Patent number: 11705089
    Abstract: A system includes a spatial light modulator (SLM) configured to project an image. The system also includes a controller coupled to the SLM. The controller is configured to receive the image and determine a brightness level of the image. The controller is also configured to enforce a brightness limit on the image responsive to the brightness level, to produce a reduced image. The controller is configured to instruct a display to display the reduced image.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: July 18, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Robert Floyd Payne, Harsh Dinesh Jhaveri, Jeffrey Matthew Kempf
  • Publication number: 20230148367
    Abstract: In accordance with at least one example of the description, a multimode (MM) receiver includes a single-ended mode (SEM) receiver, a differential mode (DM) receiver, and a MM input interface. The SEM receiver having a SEM input. The DM receiver having a first DM input and a second DM input. The SEM receiver and the DM receiver being configured to support different transmission modes. The MM input interface having a first MM input and a second MM input. The MM input interface adapted to be coupled to a driver. The first MM input coupled to the SEM input and the first DM input. The second MM input coupled to the second DM input.
    Type: Application
    Filed: April 29, 2022
    Publication date: May 11, 2023
    Inventors: Harsh Dinesh JHAVERI, Mark WOLFE
  • Publication number: 20220224868
    Abstract: In a described example, a device includes: a semiconductor substrate; a memory array on the semiconductor substrate, the memory array comprising rows and columns of memory cells in a Manhattan pattern, the memory cells having a pitch in a direction along the columns; and an array of micromirrors in a diamond pattern over the memory cells, the micromirrors coupled to corresponding memory cells, the micromirrors having a diagonal pitch length in the direction along the columns that is between 1.8 times the pitch and 2.2 times the pitch.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 14, 2022
    Inventors: Noah Alan Robb, Harsh Dinesh Jhaveri, Priyankar Mathuria
  • Publication number: 20220165223
    Abstract: Method and apparatus for matched buffer decompression. In some examples, a circuit comprising a first data element, a second data element, a first buffer coupled to the first data element, a second buffer coupled to the second data element, compression override logic circuits coupled to the first data element and the second data element, and a parallel register coupled to the compression override logic circuits.
    Type: Application
    Filed: July 29, 2021
    Publication date: May 26, 2022
    Inventors: Stephen Phillip Savage, Harsh Dinesh Jhaveri
  • Publication number: 20210312885
    Abstract: A system includes a spatial light modulator (SLM) configured to project an image. The system also includes a controller coupled to the SLM. The controller is configured to receive the image and determine a brightness level of the image. The controller is also configured to enforce a brightness limit on the image responsive to the brightness level, to produce a reduced image. The controller is configured to instruct a display to display the reduced image.
    Type: Application
    Filed: April 7, 2021
    Publication date: October 7, 2021
    Inventors: Robert Floyd PAYNE, Harsh Dinesh JHAVERI, Jeffrey Matthew KEMPF