Patents by Inventor Harsha Vardhana Gonchigara Vemanna

Harsha Vardhana Gonchigara Vemanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12272164
    Abstract: A method for performing automated GUI-driven OpROM validation starts with a processor executing an automated test script; and in response to executing the automated test script, the processor is caused to remotely accessing a memory sub-system using a web driver and an interface. The processor causes a BIOS terminal window of the memory sub-system to be displayed on a display screen. The processor captures a screenshot of the BIOS terminal window and generating an image based on the screenshot. The processor converts the image to text using OCR and generates an output comprising BIOS configuration details based on the text using a machine-learning algorithm. The processor then analyzes the output to validate the memory sub-system when no errors are detected in the output or to flag the memory sub-system when errors are detected in the output. Other embodiments are described herein.
    Type: Grant
    Filed: August 17, 2023
    Date of Patent: April 8, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Shiva Pahwa, Harsha Vardhana Gonchigara Vemanna, Sathyashankara Bhat Muguli
  • Publication number: 20240070050
    Abstract: A method for performing automated GUI-driven OpROM validation starts with a processor executing an automated test script; and in response to executing the automated test script, the processor is caused to remotely accessing a memory sub-system using a web driver and an interface. The processor causes a BIOS terminal window of the memory sub-system to be displayed on a display screen. The processor captures a screenshot of the BIOS terminal window and generating an image based on the screenshot. The processor converts the image to text using OCR and generates an output comprising BIOS configuration details based on the text using a machine-learning algorithm. The processor then analyzes the output to validate the memory sub-system when no errors are detected in the output or to flag the memory sub-system when errors are detected in the output. Other embodiments are described herein.
    Type: Application
    Filed: August 17, 2023
    Publication date: February 29, 2024
    Inventors: Shiva Pahwa, Harsha Vardhana Gonchigara Vemanna, Sathyashankara Bhat Muguli