Patents by Inventor Harshadrai Parekh

Harshadrai Parekh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11010409
    Abstract: According to one embodiment, a request is received to replicate a plurality of ranges of a source file from a source storage system to a target storage system, where the request specifies a first range of the source file and a second range of the source file. A first replication stream and a second replication stream of a replication session are established with the target storage system. First data of the first range and the second data of the second range from the source file are directly read from the source file, without creating separate files for storing the first data and the second data. The first data and second data are transmitted to the target storage system via the first stream and the second stream respectively in parallel.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: May 18, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Salil Dangi, Harshadrai Parekh
  • Patent number: 10929382
    Abstract: In general, embodiments of the invention relate to methods and systems for replicating data, which is stored in a source system, in a target system. More specifically, embodiments of the invention enable parallel transmission and verification of portions of the data. Once the portions of the data have been verified, embodiments of the invention combine the verified portions of the data to obtain the final combined data. The combined data is then verified.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: February 23, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Krithika Subramanian, Srisailendra Yallapragada, Harshadrai Parekh, Bhimsen Bhanjois
  • Patent number: 10331362
    Abstract: Described is a system for identifying data that may differ between files used as part of a replication process. The system may determine a type of segmentation used for segmenting data such as a variable size segmentation or a fixed size segmentation is used. Based on the segmentation of a file, the system may identify segments that may be modified. For example, the system may identify only the particular modified segments within a boundary when a fixed size segmentation is used identify all of the segments within a boundary as modified when a variable segmentation is used. Accordingly, depending on the scenario, the system may determine an efficient mechanism for identifying data to send to a target storage as part of a replication process.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 25, 2019
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventor: Harshadrai Parekh
  • Patent number: 8584138
    Abstract: An embodiment of the invention provides an apparatus and a method for direct switching of software threads. The apparatus and method include performing acts including: issuing a wakeup call from a first thread to a second thread in a sleep state; removing the second thread from the sleep state; switching out the first thread from the resource; switching in the second thread to the resource; and running the second thread on the resource.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: November 12, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Vasudevan Sangili, Edward J. Sharpe, Harshadrai Parekh
  • Patent number: 8032884
    Abstract: Systems, methods, and devices, including computer executable instructions for transferring threads are described. The method comprises determining an idle processor by checking a handoff state of the processor prior to placing an identified runnable thread in a run queue of an idle processor. The method also comprises transferring the runnable thread to a determined idle processor by setting the handoff state of the processor to a handle of the runnable thread.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: October 4, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Harshadrai Parekh, Colin Edward Honess, Douglas V. Larson, Swapneel Kekre
  • Publication number: 20090037927
    Abstract: An embodiment of the invention provides an apparatus and a method for direct switching of software threads. The apparatus and method include performing acts including: issuing a wakeup call from a first thread to a second thread in a sleep state; removing the second thread from the sleep state; switching out the first thread from the resource; switching in the second thread to the resource; and running the second thread on the resource.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Inventors: Vasudevan Sangili, Edward J. Sharpe, Harshadrai Parekh
  • Publication number: 20080250412
    Abstract: One embodiment relates to a computer-implemented method of concurrently performing a process-wide operation in a multi-threaded process being executed on a computer system so as to result in more efficient performance of the computer system. A plurality of threads of the process concurrently participate in the process-wide operation. Finishing steps of the process-wide operation are performed by a last thread participating in the process-wide operation, regardless of whether the last thread is an initiator thread or a target thread. Other embodiments, aspects, and features are also disclosed.
    Type: Application
    Filed: April 6, 2007
    Publication date: October 9, 2008
    Inventors: Elizabeth An-Li Clark, Hari Ganapathy, Harshadrai Parekh
  • Publication number: 20080235704
    Abstract: One embodiment relates to a multiprocessor system with a modular load balancer. The multiprocessor system includes a plurality of processors, a memory system, and a communication system interconnecting the processors and the memory system. A kernel comprising instructions that are executable by the processors is provided in the memory system, and a scheduler is provided in the kernel. Load balancing routines are provided in the scheduler, the load balancing routines including interfaces for a plurality of balancer operations. At least one balancer plug-in module is provided outside the scheduler, the balancer plug-in module including the plurality of balancer operations. Other embodiments, aspects, and features are also disclosed.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 25, 2008
    Inventors: Vasudev Kanduveed, Harshadrai Parekh
  • Publication number: 20080104593
    Abstract: Systems, methods, and devices, including computer executable instructions for transferring threads are described. The method comprises determining an idle processor by checking a handoff state of the processor prior to placing an identified runnable thread in a run queue of an idle processor. The method also comprises transferring the runnable thread to a determined idle processor by setting the handoff state of the processor to a handle of the runnable thread.
    Type: Application
    Filed: October 31, 2006
    Publication date: May 1, 2008
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Harshadrai Parekh, Colin Edward Honess, Douglas V. Larson, Swapneel Kekre
  • Publication number: 20060020701
    Abstract: Apparatus and methods are provided for transferring threads. One embodiment of a computing device includes a number of processors including a first processor, a memory in communication with the at least one of the number of processors, and computer executable instructions stored in memory and executable on at least one of the number of processors. The computer executable instructions include instructions to select a second processor, wherein the selection is based upon proximity of the second processor to the first processor. Computer executable instructions also include instructions to select a thread for transfer from the second processor and transfer the selected thread from the second processor to the first processor.
    Type: Application
    Filed: March 7, 2005
    Publication date: January 26, 2006
    Inventors: Harshadrai Parekh, Swapneel Kekre
  • Publication number: 20060015872
    Abstract: Systems, methods, and device are provided for process management. One method embodiment includes, in a system process, starting an orphan collector thread (OCT) which is dedicated to cleaning up orphaned children processes adopted by the system process. The orphaned children processes are flagged when adopted by the system process. The OCT will execute a function call to clean up only processes which are flagged as having been adopted by the system process and which have terminated.
    Type: Application
    Filed: March 8, 2005
    Publication date: January 19, 2006
    Inventors: William Pohl, Eric Hamilton, Harshadrai Parekh
  • Publication number: 20050283556
    Abstract: Apparatus and methods are provided for transferring interrupts. One embodiment of a computing device includes a first processor, a memory in communication with the first processor, and computer executable instructions stored in memory and executable on the first processor. The computer executable instructions are provided to select an interrupt, that has been waiting to be processed, for transfer from the first processor, check a number of other processors to select a second processor that has a short wait time for processing the interrupt, and transfer the interrupt from the first processor to the second processor.
    Type: Application
    Filed: June 18, 2004
    Publication date: December 22, 2005
    Inventor: Harshadrai Parekh