Abstract: An integrated circuit (IC) device comprises a conductive contact at a surface of the IC device. A resistive element is coupled between the conductive contact and first circuitry. Second circuitry is coupled between the resistive element and the conductive contact. The second circuitry is further coupled with a supply line and comprises at least one of a diode or a power clamp. The resistive element is disposed in a first metallization layer of the IC device. A first dielectric layer is adjacent to the first metallization layer. A second metallization layer is adjacent to the first dielectric layer. A height of the first dielectric layer and the second metallization layer is a first distance. A zone overlaps the resistive element, and extends a second distance away from the resistive element. The zone is free of conductive material and the second distance is greater than the first distance.

Abstract: An integrated circuit (IC) device comprises a conductive contact at a surface of the IC device. First and second circuitry are coupled with the conductive contact. First and second supply lines are coupled with and provide power to the first circuitry, the first supply line providing a first voltage, and the second supply line providing a second voltage. The second circuitry is further coupled with the second supply line and a third supply line. The third supply line is to provide a third voltage and may provide a path for a current associated with an electrostatic discharge (ESD) event. A resistive element is coupled between the first supply line and the third supply line. The resistive element may reduce a current in the first supply line associated with an ESD event.

Abstract: Embodiments herein relate to systems, apparatuses, techniques or processes for reducing the capacitance of a package that includes a die by at least partially surrounding the die within a mold compound and a dielectric material with different dielectric constants. Other embodiments may be described and/or claimed.

Abstract: Glass layers and capacitors for use with integrated circuit packages are disclosed. An example integrated circuit (IC) package includes a semiconductor die, a glass layer, and a capacitor electrically coupled to the semiconductor die, at least one side of the capacitor enclosed by the glass layer, the capacitor positioned closer to the glass layer than the semiconductor die is to the glass layer.

Abstract: Techniques and mechanisms for a DC-DC voltage converter to mitigate a risk of damage to circuitry due to electrostatic discharge (ESD). In an embodiment, a protection circuit of the DC-DC voltage converter comprises a pull-up circuit and a pull-down circuit which are coupled in series between a first interconnect and a second interconnect, which are to receive a first supply voltage and a second supply voltage, respectively. A voltage divider comprises capacitors which are coupled in series with each other between the first interconnect and the second interconnect. Control circuitry is coupled with the voltage divider, and is further coupled to automatically configure a first operational mode based on an ESD event. During the first mode, the pull-up circuit is disabled and the pull-down circuit is enabled. In another embodiment, a resistor-capacitor (RC) circuit automatically transitions the protection circuit from the first mode.

Abstract: Techniques and mechanisms for selectively disabling functionality of a power clamp circuit which is to mitigate damage due to electrostatic discharge (ESD). In an embodiment, a shut-off circuit is coupled to receive a control signal which indicates an actual or expected future power state transition of a load. The power clamp circuit comprises a pull-up circuit and a pull-down circuit which are coupled in series between a first interconnect and a second interconnect, which are to receive a first supply voltage and a second supply voltage, respectively. Based on a filtered version of the control signal, the shut-off circuit generates a first one or more signals to selectively disable the pull-up circuit. The shut-off circuit further generates a second one or more signals, based on the filtered version of the control signal, to selectively disable the pull-down circuit.

Abstract: An electrostatic discharge protection circuit, device, system, and apparatus has low-leakage for a large voltage swing of positive current.

Abstract: An electrostatic discharge protection circuit, device, system, and apparatus has low-leakage for a large voltage swing of negative current.