Abstract: A network element for a transport network contains a multistage lower order switching matrix with at least an input matrix stage and an output matrix stage designed to switch lower order multiplex units and with a center stage capable of switching higher order multiplex units, only, thereby connecting the input and output stages.

Abstract: A network element for a transport network contains a multistage lower order switching matrix with at least an input matrix stage and an output matrix stage designed to switch lower order multiplex units and with a center stage capable of switching higher order multiplex units, only, thereby connecting the input and output stages.

Abstract: Regenerator sections in known regenerators, which comply with CCITT-Recommendation G.958, are supervised by monitoring the transmission error probability of SDH (synchronous digital hierarchy) signals, through determination of the parity. This requires the breakdown and restoration of the SDH signal. This requires special signal processing installations, not required for regenerating transmission signals, such as multiplexer and demultiplexer, which cause considerable loss of output. The regenerator (RE) according to the invention determines the transmission error probability by comparing a known word in the head part of an STM-N signal with a reference word. The transmission error probability is derived from the result of the comparison, and transmitted to a central unit via an error line (FL). For example, to transmit the transmission error probability in an STM-N signal, the service channel of a regenerator that complies with CCITT-Recommendation G.958 may be used.

Abstract: Parallel working additive scramblers produce a predetermined pseudorandom sequence of length L in a word generator, which consists of an N-stage shift register. To obtain more than N parallel located pseudorandom sequences, the word generator is connected to a network in which, in addition to the pseudorandom sequences created by modulo-2 addition, other pseudorandom sequences are created with a different phase relation. Performing the linkage operations limits the maximum bit rate sequence that can be transmitted. The entire pseudorandom sequence is stored in a memory (S). The desired pseudorandom sequence is produced in a circular storage (RS) by means of shifting operations. The circular storage (RS) is in the form of a feedback shift register (SR) and is used as the memory (S), in which each of the outputs is connected to an input of an EXOR-gate, in which a pseudorandom sequence is modulo-2 added with a partial stream of a parallelized serial data stream.