Patents by Inventor Hartmut Rulke

Hartmut Rulke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8557667
    Abstract: By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: October 15, 2013
    Assignee: Globalfoundries Inc.
    Inventors: Hartmut Rülke, Katja Huy, Markus Lenski
  • Publication number: 20050136606
    Abstract: By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.
    Type: Application
    Filed: November 12, 2004
    Publication date: June 23, 2005
    Inventors: Hartmut Rulke, Katja Huy, Markus Lenski
  • Patent number: 6806191
    Abstract: A copper line that is formed in a patterned dielectric layer has a copper/silicon film formed on a surface thereof to substantially suppress an electromigration path through this surface. In an in situ process, the exposed copper surface is first cleaned by a reactive plasma ambient including nitrogen and ammonia and after a certain clean period, a gaseous compound comprising silicon, for example silane, is added to the reactive plasma ambient to form the copper/silicon film. Additionally, a capping layer may be deposited, wherein due to the copper/silicon film, any deposition technique or even spin-coating may be used.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: October 19, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christian Zistl, Jörg Hohage, Hartmut Rülke, Peter Hübler
  • Publication number: 20030224599
    Abstract: A copper line that is formed in a patterned dielectric layer has a copper/silicon film formed on a surface thereof to substantially suppress an electromigration path through this surface. In an in situ process, the exposed copper surface is first cleaned by a reactive plasma ambient including nitrogen and ammonia and after a certain clean period, a gaseous compound comprising silicon, for example silane, is added to the reactive plasma ambient to form the copper/silicon film. Additionally, a capping layer may be deposited, wherein due to the copper/silicon film, any deposition technique or even spin-coating may be used.
    Type: Application
    Filed: November 26, 2002
    Publication date: December 4, 2003
    Inventors: Christian Zistl, Jorg Hohage, Hartmut Rulke, Peter Hubler