Patents by Inventor Hartwig W. Thim

Hartwig W. Thim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Logic circuit arrangement with field effect transistors matched thereto
    Patent number: 4713676
    Abstract: A logic circuit arrangement has direct coupling of a drain and gate of two successive stages. At least one of the FET's has a buried electrode layer with adjacent, non-tunnelable insulator layers. The electrode layer is electrically charged from the outside by irradiation so that the zone comprising the length L.sub.g has a normally-off character.
    Type: Grant
    Filed: April 10, 1985
    Date of Patent: December 15, 1987
    Inventor: Hartwig W. Thim