Patents by Inventor Haru Ohkawa

Haru Ohkawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of fabricating power VLSI diode devices
    Patent number: 6537860
    Abstract: A method for manufacturing a discrete power rectifier device having a VLSI multi-cell design employs a two spacer approach to defining a P/N junction profile having good breakdown voltage characteristics. The method provides highly repeatable device characteristics at reduced cost. The active channel regions of the device are also defined using the same two spacers. The method is a self-aligned process and channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer formation. Only two masking steps are required, and additional spacers for defining the body region profile can be avoided, reducing processing costs.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: March 25, 2003
    Assignees: APD Semiconductor, Inc., Fujifilm Microdevices Company, Ltd.
    Inventors: Hidenori Akiyama, Paul Chang, Geeng-Chuan Chern, Wayne Y. W. Hsueh, Haru Ohkawa, Yasuo Ohtsuki, Vladimir Rodov
  • Method of fabricating power VLSI diode devices
    Publication number: 20020076860
    Abstract: A method for manufacturing a discrete power rectifier device having a VLSI multi-cell design employs a two spacer approach to defining a P/N junction profile having good breakdown voltage characteristics. The method provides highly repeatable device characteristics at reduced cost. The active channel regions of the device are also defined using the same two spacers. The method is a self-aligned process and channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer formation. Only two masking steps are required, and additional spacers for defining the body region profile can be avoided, reducing processing costs.
    Type: Application
    Filed: December 18, 2000
    Publication date: June 20, 2002
    Inventors: Hidenori Akiyama, Paul Chang, Geeng-Chuan Chern, Wayne Y.W. Hsueh, Haru Ohkawa, Yasuo Ohtsuki, Vladimir Rodov