Patents by Inventor Haruhiko Matsuyama

Haruhiko Matsuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6132852
    Abstract: A multilayer wiring substrate using a resin composition comprising polyquinoline compound and bismaleimide compound as essential ingredients between wiring-carrying resin layers as insulating layers forms no void at the time of lamination, has an excellent adhesive property at various interfaces, has a heat stability after lamination and is high in reliability, so that, it is applicable to many fields not only including the multilayer wiring substrates capable of mounting LSI or tip carrier directly but also including multilayer wiring substrate for work station, mounting substrates for small-sized electronic devices such as camera and video for people's use, and high frequency multitip module multilayer substrate.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: October 17, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Suzuki, Akio Takahashi, Minoru Tanaka, Haruhiko Matsuyama, Haruo Akahoshi
  • Patent number: 6124553
    Abstract: A multilayer wiring system for preventing the generation of fixing failure due to an organic residue, eliminating an increase in the number of processes and reducing an area necessary for bonding of the cap and its fabrication method. The multilayer wiring board includes at least one wiring layer made of a conductor, at least one insulating layer made of an organic matter and a board. The wiring layer and the insulating layer are alternately laminated on the board and a cap is provided for covering the insulating layer and the wiring layer. The wiring layer has a wiring pattern for forming a wiring and a frame pattern for surrounding the wiring pattern. This frame pattern includes vent holes. The insulating layer has a shield structure made of an inorganic matter around the outer peripheral portion thereof and/or in the interior thereof. The shield structure is formed of the frame patterns continuously connected to each other and the cap is joined to an uppermost layer of the shield structure.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: September 26, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yasunori Narizuka, Naoki Matsushima, Hidetaka Shigi, Haruhiko Matsuyama
  • Patent number: 5970310
    Abstract: To form in a batch manner a thin-film wiring pattern in high precision over an entire region of a ceramics multilayer wiring board containing distortion and deformation, a correction amount of the ceramics multilayer wiring board (rotation angle and movement amount of position of this ceramics multilayer wiring board) is calculated in a computer by applying, for instance, the least squares method to positional coordinate values of each of the LSI mounting areas of the ceramics multilayer board and also to positional coordinate values corresponding thereto on a photomask. A support apparatus for supporting the multilayer wiring board is controlled based upon the calculated correction amount, so that the multilayer wiring board can be aligned with respect to the photomask.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: October 19, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shigemasa Satoh, Kenichi Sugeno, Haruhiko Matsuyama
  • Patent number: 5958600
    Abstract: Disclosed are a highly reliable circuit board and a method of stably manufacturing the circuit board, wherein an insulator made from a specific organic insulating material is provided under a highly stressed conductor for preventing occurrence of cracks in the insulator. In addition, a method of correcting a wiring of a ceramic board is additionally adopted. The circuit board includes a thick film wiring board 1 having a first conductor pattern 2 and a thin film layer laminated on the first conductor pattern 2.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: September 28, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sotokawa, Akira Yabushita, Takashi Inoue, Hidetaka Shigi, Mamoru Ogihara, Haruhiko Matsuyama, Minoru Tanaka, Yasunori Narizuka
  • Patent number: 5868949
    Abstract: A metalization structure having a first conductor layer on the surface of an underlying layer and, further, a second conductor layer connected conductively with the first conductor layer in which a polyimide insulative film of low thermal expansion coefficient is present between at least an end of a pattern of the second conductor layer and the first conductor layer, for stably obtaining a metalization structure of high reliability and free from the worry of peeling of the conductor portion from a substrate or occurrence of cracking to the underlying layer.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: February 9, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sotokawa, Masashi Nishiki, Eiji Matsuzaki, Hidetaka Shigi, Toshio Terouchi, Mamoru Ogihara, Haruhiko Matsuyama, Minoru Tanaka
  • Patent number: 5851681
    Abstract: This invention relates to a wiring structure having metal wiring layers and polyimide layers. An object of this invention is to overcome problems caused by oxidation of a metal surface, such as an increase in the resistance of wiring and a reduction in insulation, by preventing a reaction between a metal of the wiring layers, such as copper, and carboxyl groups of polyamic acid which make up the polyimide layers. In the wiring structure according to the present invention, the polyimide layers have been formed by heating and curing a resin composition which comprises a polyimide precursor, an amine compound and an organic solvent.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: December 22, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiko Matsuyama, Eiji Matsuzaki, Shozi Ikeda, Fumio Kataoka, Fusaji Shoji
  • Patent number: 5753372
    Abstract: The present invention provides the wiring structure having a wiring layer and insulation layer and the method of manufacturing the same, wherein at least a part of the wiring of said wiring layer comprises copper, and said insulation layer comprises the polyimide obtained by heating the polyimide precursor composition containing the polyimide precursor having the repeating unit which can be represented by the following general formula (Chemical formula 15). ##STR1## (In this formula, R.sup.1 is at least one type of quadrivalent organic group selected from among the Chemical formulae 16, while R.sup.2 is a bivalent organic group containing aromatic ring).
    Type: Grant
    Filed: July 10, 1995
    Date of Patent: May 19, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sotokawa, Miharu Otani, Fumio Kataoka, Fusaji Shoji, Haruhiko Matsuyama, Eiji Matsuzaki, Shogi Ikeda, Hidetaka Shigi, Tetsuya Yamazaki, Naoki Matsushima, Shirou Akamatsu
  • Patent number: 5388328
    Abstract: A process for the fabrication of an interconnected multilayer board involves the steps of forming a metallic under-conductive layer on a base substrate, forming a windowed resist layer on the metallic under-conductive layer, filling windows of the resist layer with a conductor by plating thereby forming a conductor layer, forming another windowed resist layer on the conductor layer and filling windows of this resist layer with a conductor by plating, thereby forming a via-hole layer and to provide a two-level structure of the conductor layer and the via-hole layer. Thereafter, the resist layers and portions of the metallic under-conductor layer other than those in contact with a lower face of the conductor constituting the conductor layer are dissolved to form a two-level skeleton structure of conductor lines and spaces within the skeleton structure are filled with a varnish in a solventless form and the varnish is cured.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: February 14, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura, Haruhiko Matsuyama, Hitoshi Oka, Fumio Kataoka, Fusaji Shoji, Hideyasu Murooka, Masayuki Kyooi
  • Patent number: 5300735
    Abstract: Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.
    Type: Grant
    Filed: March 22, 1993
    Date of Patent: April 5, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Yokono, Hideo Arima, Takashi Inoue, Naoya Kitamura, Haruhiko Matsuyama, Hitoshi Oka, Fumio Kataoka, Fusaji Shoji, Hideyasu Murooka, Masayuki Kyooi
  • Patent number: 5280102
    Abstract: Heat-resistant bonding materials are composed of a polyimide precursor end-capped at molecule ends thereof and/or an imide compound formed from the polyimide precursor. They may also contain fine particles of at least one material selected from metals, metal oxides, metal carbides and metal nitrides.
    Type: Grant
    Filed: March 28, 1990
    Date of Patent: January 18, 1994
    Assignees: Hitachi, Ltd., Hitachi Chemical Co.
    Inventors: Haruhiko Matsuyama, Fusaji Shoji, Atsushi Honda, Teruki Aizawa
  • Patent number: 5208656
    Abstract: A multilayer wiring substrate having high reliability can be produced in good productivity by subjecting metal wiring layers to stabilization treatment on the surface with a metal such as Cr, Mo or the like or an aqueous solution of water glass so as to prevent generation of hillocks or whiskers and to improve chemical resistance.
    Type: Grant
    Filed: March 25, 1991
    Date of Patent: May 4, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiko Matsuyama, Mitsuo Yoshimoto, Jun Tanaka, Fusaji Shoji, Hitoshi Yokono, Takashi Inoue, Tetsuya Yamazaki, Minoru Tanaka, Hidetaka Shigi
  • Patent number: 4824731
    Abstract: A thin film magnetic head of which the insulation layer is made of a polyimide resin obtained by heat-curing a polyimide precursor represented by the following general formula (I) or (II) or a mixture thereof not only has excellent characteristics with respect to the insulation layer, i.e. satisfactory flatness, high glass transition temperature and excellent adhesiveness but also is free from film defects, i.e., exhibits high reliability: ##STR1## wherein R is, e.g., ##STR2## Ar.sup.1 is, e.g., ##STR3## Ar.sup.2 is, e.g. ##STR4## n is an integer of 1 to 100, and m is an integer of 10 to 500.
    Type: Grant
    Filed: January 28, 1988
    Date of Patent: April 25, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiko Matsuyama, Fusaji Shoji, Shunichiro Kuwatsuka, Kenji Sugimoto
  • Patent number: 4772505
    Abstract: The inclination angle, in the conductor pattern end portion of a magnetic bubble memory element having a bubble diameter of up to 1.2 .mu.m, can be remarkably reduced by employing a polymer resin, having fluidity in a curing process, as the insulation film under the conductor pattern, so that the transfer margin is greatly improved.
    Type: Grant
    Filed: August 18, 1986
    Date of Patent: September 20, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiko Matsuyama, Fusaji Shoji, Hiroshi Umezaki, Masatoshi Takeshita, Naoki Koyama, Ryo Suzuki
  • Patent number: 4748228
    Abstract: An organic silicon-terminated polyimide precursor having a very stable solution viscosity is produced by polycondensing 100 parts by weight of a mixture composed of 90 to 99.5% by mole of an organic diamine represented by the following general formula (I) and 10 to 0.5% by weight by mole of an organic silyl represented by the following general formula (II): ##STR1## wherein R.sup.1 and R.sup.2 are divalent organic groups; R.sup.3 and R.sup.4 are monovalent organic groups; m is 0, 1, 2, or 3, with an organic tetracarboxylic acid dianhydride represented by the following general formula (III) in a molar amount corresponding to the 100 parts by weight of the mixture of the organic diamine and the organic silyl represented by the said general formulae (I) and (II), respectively, in an organic polar solvent at 0.degree. to 40.degree. C., thereby obtaining a solution of organic silicon-terminated polyimide precursor, and heating the solution at 50.degree. to 80.degree. C.: ##STR2## wherein R.sup.
    Type: Grant
    Filed: May 14, 1986
    Date of Patent: May 31, 1988
    Assignees: Hitachi. Ltd., Hitchi Chemical Co.
    Inventors: Fusaji Shoji, Haruhiko Matsuyama, Akio Fujiwara, Fumio Kataoka, Teruji Aizawa
  • Patent number: 4686147
    Abstract: A highly reliable magnetic head which exhibits excellent magnetic characteristics and is free from film defects can be produced by using a silicone-containing polyimide resin as a material for insulation layers to thereby form homogeneous and flat insulation layers. Such a polyimide resin is suitable for other multi-layered stereo-wiring structures.
    Type: Grant
    Filed: February 18, 1986
    Date of Patent: August 11, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiko Matsuyama, Fusaji Shoji, Shunichiro Kuwazuka
  • Patent number: 4643913
    Abstract: A process for producing solar cells which comprises applying a composition for anti-reflection coating formation on one side of a silicon base plate having a p-n junction therein, printing an Ag paste for contact formation on predetermined areas of the coat, and heat-treating the resulting plate at a temperature of 400.degree. to 900.degree. C. to complete anti-reflection coating and a light-receiving side contact, the process being characterized in that the composition for anti-reflection coating formation contains as essential component, (a) at least one member selected from the metal-organic ligand complex compounds represented by the general formula M(OR.sub.1).sub.n (L).sub.a-n wherein M is a metal selected from Zn, Al, Ga, In, Ti, Zr, Sn, V, Nb, Ta, Mo, and W; R.sub.1 is a C.sub.1 -C.sub.18 alkyl group; L is an organic ligand which forms an non-hydrolyzable bond with the metal ion; a is the valency of the metal M; and n is an integer satisfying 1.ltoreq.
    Type: Grant
    Filed: December 28, 1984
    Date of Patent: February 17, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masaaki Okunaka, Mitsuo Nakatani, Haruhiko Matsuyama, Hitoshi Yokono, Tokio Isogai, Tadashi Saitoh, Kunihiro Matsukuma, Sumiyuki Midorikawa, Satoru Suzuki
  • Patent number: 4486232
    Abstract: An electrode material for semi-conductor device such as solar cells comprises Ag powders, at least one metal of zirconium, hafnium, vanadium, niobium, and tantalum, an organic binder, and an organic solvent, and, if necessary, glass, Pd powders and Pt powders.The electrodes are prepared from the electrode material by printing, drying and firing at a low temperature and have a low contact resistance without any junction breakage or increase in leak current.
    Type: Grant
    Filed: August 17, 1983
    Date of Patent: December 4, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Nakatani, Haruhiko Matsuyama, Masaaki Okunaka, Hitoshi Yokono, Tokio Isogai, Tadashi Saitoh, Sumiyuki Midorikawa