Patents by Inventor Haruhiro Shirazawa

Haruhiro Shirazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4332075
    Abstract: A method of producing thin film transistor arrays and having at least 7 steps including: a first step of forming a first electrode layer uniformly over an insulating substrate; a second step of forming electrodes, such as drain and source electrodes and bus bars with a desired pattern by photoetching the first electrode; a third step of forming a uniform semiconducting layer on the surface of the substrate having the patterned electrodes; a fourth step of successively forming a uniform insulating layer over the uniformly deposited semiconducting layer while keeping the array in a vacuum; a fifth step of photoetching the uniformly deposited insulating layer into a desired pattern; a sixth step of photoetching the uniform semiconducting layer into the same pattern as the patterned insulating layer; a seventh step of forming a second electrode uniformly over the surface having the patterned electrodes and insulating layer; and an eighth step of photoetching the uniformly deposited second electrode into a desired
    Type: Grant
    Filed: May 22, 1979
    Date of Patent: June 1, 1982
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Ota, Haruhiro Shirazawa, Toshio Tatsumichi, Hiroshi Kawarada, Tetsuro Ohtsuka