Patents by Inventor Haruhisa Naganokawa

Haruhisa Naganokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121531
    Abstract: Image capturing that suppresses a drop in numerical aperture and achieves a smaller size is disclosed. In one example, an image capturing apparatus includes pixels each having a photoelectric conversion unit, a floating diffusion that outputs a voltage according to a charge obtained from photoelectric conversion by the photoelectric conversion unit, and a current amplification unit that amplifies a current according to the voltage of the floating diffusion. The region in which the photoelectric conversion units are disposed and the region in which the current amplification units are disposed transmit and receive the voltages of the floating diffusions through a corresponding signal transmission unit.
    Type: Application
    Filed: March 29, 2022
    Publication date: April 11, 2024
    Inventors: Haruhisa Naganokawa, Kengo Umeda
  • Patent number: 11095278
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 17, 2021
    Assignee: Sony Corporation
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20180226962
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.
    Type: Application
    Filed: April 9, 2018
    Publication date: August 9, 2018
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Patent number: 9985622
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Patent number: 9131175
    Abstract: There is provided a solid state imaging apparatus, including a plurality of line sensors including a plurality of pixels arrayed in a line, each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer, and signal lines each for reading a signal of each pixel of the line sensors. The plurality of line sensors are discretely arranged, and the signal lines are gathered and wired along a region in which a circuit block including the line sensors is arranged.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: September 8, 2015
    Assignee: SONY CORPORATION
    Inventors: Kenya Kondou, Haruhisa Naganokawa, Daijiro Anai, Makoto Aoki, Syouhei Taguchi, Ken Koseki, Nobuo Nakamura
  • Patent number: 9123620
    Abstract: A solid-state image capture device includes unit pixels including transfer gates that transfer charges to diffusion layers, the charges being obtained by photoelectric conversion performed by photoelectric converting sections; signal lines to which signals output from the unit pixels are read out: current sources connected to the signal lines; and a driver that electrically cuts off connections between the unit pixels and the signal lines and the signal lines and the current sources in a transfer period of the transfer gates.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: September 1, 2015
    Assignee: SONY CORPORATION
    Inventors: Haruhisa Naganokawa, Shizunori Matsumoto
  • Publication number: 20150237285
    Abstract: A solid-state imaging device that outputs a pixel signal having a signal level corresponding to charges generated by a photoelectric conversion includes a comparator. The comparator has a first amplifying unit with first and second transistors configured as a differential pair and provides a signal output by amplifying a difference of signals input to the gate electrodes of the first and second transistors. It also has a second amplifying unit that amplifies the signal output, a first condenser disposed between the gate electrode of the first transistor and a reference signal supply, a second condenser disposed between the gate electrode of the second transistor and pixel signal wiring that reads out the pixel signal, and a switching circuit that connects the reference signal supply to the pixel signal wiring.
    Type: Application
    Filed: April 29, 2015
    Publication date: August 20, 2015
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Patent number: 9041583
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a first condenser that is disposed between a gate electrode of the first transistor and a reference signal supply unit; a second condenser that is disposed between a gate electrode of the second transistor and a pixel signal wiring; a third transistor that connects a connection point of the gate electrode of the first transistor and the first condenser to the pixel signal wiring; and a fourth transistor that connects a connection point of the gate electrode of the second transistor and the second condenser to the pixel signal wiring.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 26, 2015
    Assignee: Sony Corporation
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20140291482
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.
    Type: Application
    Filed: March 13, 2014
    Publication date: October 2, 2014
    Applicant: SONY CORPORATION
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20140293104
    Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a first condenser that is disposed between a gate electrode of the first transistor and a reference signal supply unit; a second condenser that is disposed between a gate electrode of the second transistor and a pixel signal wiring; a third transistor that connects a connection point of the gate electrode of the first transistor and the first condenser to the pixel signal wiring; and a fourth transistor that connects a connection point of the gate electrode of the second transistor and the second condenser to the pixel signal wiring.
    Type: Application
    Filed: March 13, 2014
    Publication date: October 2, 2014
    Applicant: SONY CORPORATION
    Inventors: Hideki Tanaka, Shizunori Matsumoto, Haruhisa Naganokawa, Yuuichi Kaji
  • Publication number: 20140009657
    Abstract: There is provided a solid state imaging apparatus, including a plurality of line sensors including a plurality of pixels arrayed in a line, each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer, and signal lines each for reading a signal of each pixel of the line sensors. The plurality of line sensors are discretely arranged, and the signal lines are gathered and wired along a region in which a circuit block including the line sensors is arranged.
    Type: Application
    Filed: June 25, 2013
    Publication date: January 9, 2014
    Inventors: Kenya Kondou, Haruhisa Naganokawa, Daijiro Anai, Makoto Aoki, Syouhei Taguchi, Ken Koseki, Nobuo Nakamura
  • Publication number: 20130342744
    Abstract: A solid-state imaging device includes: a photoelectric conversion section configured to perform photoelectric conversion on incident light, and to store obtained photoelectric charge; a voltage conversion section configured to convert the photoelectric charge transferred from the photoelectric conversion section into a voltage signal; a first gate section configured to transfer the photoelectric charge stored in the photoelectric conversion section to the voltage conversion section; a second gate section configured to reset a potential of the voltage conversion section; a third gate section configured to directly reset the photoelectric charge stored in the photoelectric conversion section; and a control section configured to control driving of the first to the third gate sections, wherein the control section controls driving of the third gate section so as to adjust an exposure time of the photoelectric conversion section.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 26, 2013
    Applicant: SONY CORPORATION
    Inventors: Haruhisa Naganokawa, Kenya Kondou, Kandai Fukuyama