Patents by Inventor Haruhisa Okumura

Haruhisa Okumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8159486
    Abstract: A display device includes a pixel driver circuit. Each of level converter circuits in the pixel driver circuit has an input terminal supplied with a signal swinging between a first voltage and a second voltage lower than the first voltage; a first first-conductivity-type transistor having a gate electrode coupled to the input terminal, and a source region coupled to a reference voltage; a second second-conductivity-type transistor having a gate electrode coupled to a drain region of the first transistor, a source region-coupled to a power supply, and a drain region coupled to an output terminal; one circuit element among a diode, a resistor and a fourth second-conductivity-type transistor, coupled between the gate electrode of the second transistor and the power supply; a third first-conductivity-type transistor having a source region coupled to the input terminal, a drain region coupled to the output terminal, and a gate electrode supplied with a do voltage.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: April 17, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Publication number: 20080273001
    Abstract: A display device includes a pixel driver circuit. Each of level converter circuits in the pixel driver circuit has an input terminal supplied with a signal swinging between a first voltage and a second voltage lower than the first voltage; a first first-conductivity-type transistor having a gate electrode coupled to the input terminal, and a source region coupled to a reference voltage; a second second-conductivity-type transistor having a gate electrode coupled to a drain region of the first transistor, a source region-coupled to a power supply, and a drain region coupled to an output terminal; one circuit element among a diode, a resistor and a fourth second-conductivity-type transistor, coupled between the gate electrode of the second transistor and the power supply; a third first-conductivity-type transistor having a source region coupled to the input terminal, a drain region coupled to the output terminal, and a gate electrode supplied with a do voltage.
    Type: Application
    Filed: June 30, 2008
    Publication date: November 6, 2008
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Patent number: 7408544
    Abstract: A display device includes a pixel driver circuit. Each of level converter circuits in the pixel driver circuit has: an input terminal supplied with a signal swinging between a first voltage and a second voltage lower than the first voltage; a first first-conductivity-type transistor having a gate electrode coupled to the input terminal, and a source region coupled to ground; a second second-conductivity-type transistor having a gate electrode coupled to a drain region of the first transistor, a source region coupled to a power supply, and a drain region coupled to an output terminal; one circuit element among a diode, a resistor and a fourth second-conductivity-type transistor, coupled between the gate electrode of the second transistor and the power supply; a third first-conductivity-type transistor having a source region coupled to the input terminal, a drain region coupled to the output terminal, and a gate electrode supplied with a dc voltage.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: August 5, 2008
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Publication number: 20060077198
    Abstract: A display device includes a pixel driver circuit. Each of level converter circuits in the pixel driver circuit has: an input terminal supplied with a signal swinging between a first voltage and a second voltage lower than the first voltage; a first first-conductivity-type transistor having a gate electrode coupled to the input terminal, and a source region coupled to ground; a second second-conductivity-type transistor having a gate electrode coupled to a drain region of the first transistor, a source region coupled to a power supply, and a drain region coupled to an output terminal; one circuit element among a diode, a resistor and a fourth second-conductivity-type transistor, coupled between the gate electrode of the second transistor and the power supply; a third first-conductivity-type transistor having a source region coupled to the input terminal, a drain region coupled to the output terminal, and a gate electrode supplied with a dc voltage.
    Type: Application
    Filed: November 22, 2005
    Publication date: April 13, 2006
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Patent number: 6995757
    Abstract: A level converter circuit includes an input terminal adapted to be supplied with a signal swinging from a first voltage to a second voltage lower than the first voltage; a first transistor having a gate electrode connected to the input terminal, and a source electrode connected to ground potential; a second transistor having a gate electrode connected to a drain electrode of the first transistor, a source electrode connected to a supply voltage, and a drain electrode connected to an output terminal; a load circuit connected between the gate electrode of the second transistor and the supply voltage; a third transistor having a source electrode connected to the input terminal, a drain electrode connected to the output terminal, and a gate electrode supplied with a DC voltage higher than the second voltage and lower than the first voltage.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: February 7, 2006
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Publication number: 20040004593
    Abstract: A level converter circuit includes an input terminal adapted to be supplied with a signal swinging from a first voltage to a second voltage lower than the first voltage; a first transistor having a gate electrode connected to the input terminal, and a source electrode connected to ground potential; a second transistor having a gate electrode connected to a drain electrode of the first transistor, a source electrode connected to a supply voltage, and a drain electrode connected to an output terminal; a load circuit connected between the gate electrode of the second transistor and the supply voltage; a third transistor having a source electrode connected to the input terminal, a drain electrode connected to the output terminal, and a gate electrode supplied with a DC voltage higher than the second voltage and lower than the first voltage.
    Type: Application
    Filed: June 13, 2003
    Publication date: January 8, 2004
    Applicants: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Patent number: 6593920
    Abstract: A level converter circuit includes an input terminal adapted to be supplied with a signal swinging from a first voltage to a second voltage lower than the first voltage; a first transistor having a gate electrode connected to the input terminal, and a source electrode connected to ground potential; a second transistor having a gate electrode connected to a drain electrode of the first transistor, a source electrode connected to a supply voltage, and a drain electrode connected to an output terminal; a load circuit connected between the gate electrode of the second transistor and the supply voltage; a third transistor having a source electrode connected to the input terminal, a drain electrode connected to the output terminal, and a gate electrode supplied with a DC voltage higher than the second voltage and lower than the first voltage.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: July 15, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode
  • Publication number: 20010017609
    Abstract: A level converter circuit includes an input terminal adapted to be supplied with a signal swinging from a first voltage to a second voltage lower than the first voltage; a first transistor having a gate electrode connected to the input terminal, and a source electrode connected to ground potential; a second transistor having a gate electrode connected to a drain electrode of the first transistor, a source electrode connected to a supply voltage, and a drain electrode connected to an output terminal; a load circuit connected between the gate electrode of the second transistor and the supply voltage; a third transistor having a source electrode connected to the input terminal, a drain electrode connected to the output terminal, and a gate electrode supplied with a DC voltage higher than the second voltage and lower than the first voltage.
    Type: Application
    Filed: February 12, 2001
    Publication date: August 30, 2001
    Applicant: Hitachi, Ltd. and Hitachi Device Engineering Co., Ltd.
    Inventors: Haruhisa Okumura, Yukihide Ode