Patents by Inventor Haruhisa Takiguchi
Haruhisa Takiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9293647Abstract: A nitride semiconductor light-emitting device is formed of an n-type nitride semiconductor layer, a trigger layer, a V-pit expanding layer, a light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The light-emitting layer has a V-pit formed therein. The trigger layer is made of a nitride semiconductor material having a lattice constant different from that of a material that forms an upper surface of the n-type nitride semiconductor layer. The V-pit expanding layer is made of a nitride semiconductor material having a lattice constant substantially identical to that of the material that forms the upper surface of the n-type nitride semiconductor layer, and the V-pit expanding layer has a thickness of 5 nm or more and 5000 nm or less.Type: GrantFiled: December 5, 2012Date of Patent: March 22, 2016Assignees: SHARP KABUSHIKI KAISHA, YAMAGUCHI UNIVERSITYInventors: Hiroyuki Kashihara, Narihito Okada, Kazuyuki Tadatomo, Haruhisa Takiguchi
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Patent number: 8963165Abstract: A nitride semiconductor structure in which a first nitride semiconductor underlying layer is provided on a substrate having a recess portion and a projection portion provided between the recess portions at a surface thereof, the first nitride semiconductor underlying layer has at least 6 first oblique facet planes surrounding the projection portion on an outer side of the projection portion, and a second nitride semiconductor underlying layer buries the first oblique facet planes, a nitride semiconductor light emitting element, a nitride semiconductor transistor element, a method of manufacturing a nitride semiconductor structure, and a method of manufacturing a nitride semiconductor element are provided.Type: GrantFiled: December 21, 2011Date of Patent: February 24, 2015Assignee: Sharp Kabushiki KaishaInventors: Masahiro Araki, Shinya Yoshida, Haruhisa Takiguchi, Atsushi Ogawa, Takao Kinoshita, Tohru Murata, Takeshi Funaki, Masayuki Hoteida
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Publication number: 20140332756Abstract: A nitride semiconductor light-emitting device is formed of an n-type nitride semiconductor layer, a trigger layer, a V-pit expanding layer, a light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The light-emitting layer has a V-pit formed therein. The trigger layer is made of a nitride semiconductor material having a lattice constant different from that of a material that forms an upper surface of the n-type nitride semiconductor layer. The V-pit expanding layer is made of a nitride semiconductor material having a lattice constant substantially identical to that of the material that forms the upper surface of the n-type nitride semiconductor layer, and the V-pit expanding layer has a thickness of 5 nm or more and 5000 nm or less.Type: ApplicationFiled: December 5, 2012Publication date: November 13, 2014Inventors: Hiroyuki Kashihara, Narihito Okada, Kazuyuki Tadatomo, Haruhisa Takiguchi
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Publication number: 20140083453Abstract: A method for in situ cleaning of a Metal-Organic Chemical Vapor Deposition reaction chamber is provided in embodiments of the present invention. The method includes: introducing a first cleaning gas into the reaction chamber, converting the first cleaning gas into first plasma inside the reaction chamber to completely remove a carbonaceous organic substance inside the reaction chamber, wherein the first cleaning gas includes a first oxygen-containing gas; and introducing a second cleaning gas into the reaction chamber, and converting the second cleaning gas into second plasma inside the reaction chamber to completely remove a metallic oxide inside the reaction chamber, wherein the second cleaning gas includes a first halogen-containing gas.Type: ApplicationFiled: September 19, 2013Publication date: March 27, 2014Applicant: Advanced Micro-Fabrication Equipment Inc, ShanghaiInventors: Gerald Zheyao Yin, Zhiyou Du, Shuang Meng, Yang Wang, Ying Zhang, Songlin Xu, Ban Zhu, Haruhisa Takiguchi
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Publication number: 20130277684Abstract: A nitride semiconductor structure in which a first nitride semiconductor underlying layer is provided on a substrate having a recess portion and a projection portion provided between the recess portions at a surface thereof, the first nitride semiconductor underlying layer has at least 6 first oblique facet planes surrounding the projection portion on an outer side of the projection portion, and a second nitride semiconductor underlying layer buries the first oblique facet planes, a nitride semiconductor light emitting element, a nitride semiconductor transistor element, a method of manufacturing a nitride semiconductor structure, and a method of manufacturing a nitride semiconductor element are provided.Type: ApplicationFiled: December 21, 2011Publication date: October 24, 2013Inventors: Masahiro Araki, Shinya Yoshida, Haruhisa Takiguchi, Atsushi Ogawa, Takao Kinoshita, Tohru Murata, Takeshi Funaki, Masayuki Hoteida
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Publication number: 20090194783Abstract: A light emitting element includes: A light emitting element, includes: at least one LED chip provided on an installation surface of a substrate; a metallic reflecting plate, provided upright in a light projecting direction of the LED chip on the installation surface so as to surround an entire periphery of the LED chip, the metallic reflecting plate reflecting light projected from the LED chip to guide the light to a light projecting surface provided in the light projecting direction; and a first metallic portion and a second metallic portion, respectively connected to the LED chip as electrode terminals for supplying a driving current to the LED chip, each being formed in an area surrounded by the metallic reflecting plate on the installation surface, wherein an insulating section is formed surrounding the second metallic portion, to electrically insulate the second metallic portion from other portion in the area, and the first metallic portion is formed outside the insulating section in the area as an instaType: ApplicationFiled: March 31, 2009Publication date: August 6, 2009Applicant: SHARP KABUSHIKI KAISHAInventors: Masashi TAKEMOTO, Haruhisa TAKIGUCHI, Nobuo OGATA, Kenichi UKAI
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Patent number: 7349154Abstract: The reflection type screen comprises a reflection layer which is disposed on the opposite side to the projected light incident side of the screen, a horizontal view angle increasing layer which is disposed on the light incident side of the reflection layer, and a diffusion layer which is disposed on the light incident side of the horizontal view angle increasing layer. The horizontal view angle increasing layer has an array of convex ridges which are raised in a rear direction of the screen. Since the longitudinal direction of the ridges is aligned with the vertical direction of the screen, the view angle characteristics of the screen in a horizontal direction are improved and the diffusion characteristics of the screen in a vertical direction can be suppressed for preventing external disturbing light from an upper illumination light from being reflected toward the observers.Type: GrantFiled: April 27, 2004Date of Patent: March 25, 2008Assignee: Sharp Kabushiki KaishaInventors: Tomoyuki Aiura, Shuichi Yoshinaka, Takao Abumi, Haruhisa Takiguchi
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Publication number: 20070114555Abstract: A light emitting element includes: A light emitting element, includes: at least one LED chip provided on an installation surface of a substrate; a metallic reflecting plate, provided upright in a light projecting direction of the LED chip on the installation surface so as to surround an entire periphery of the LED chip, the metallic reflecting plate reflecting light projected from the LED chip to guide the light to a light projecting surface provided in the light projecting direction; and a first metallic portion and a second metallic portion, respectively connected to the LED chip as electrode terminals for supplying a driving current to the LED chip, each being formed in an area surrounded by the metallic reflecting plate on the installation surface, wherein an insulating section is formed surrounding the second metallic portion, to electrically insulate the second metallic portion from other portion in the area, and the first metallic portion is formed outside the insulating section in the area as an instaType: ApplicationFiled: November 22, 2006Publication date: May 24, 2007Applicant: SHARP KABUSHIKI KAISHAInventors: Masashi Takemoto, Haruhisa Takiguchi, Nobuo Ogata, Kenichi Ukai
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Publication number: 20040240054Abstract: The reflection type screen comprises a reflection layer which is disposed on the opposite side to the projected light incident side of the screen, a horizontal view angle increasing layer which is disposed on the light incident side of the reflection layer, and a diffusion layer which is disposed on the light incident side of the horizontal view angle increasing layer. The horizontal view angle increasing layer has an array of convex ridges which are raised in a rear direction of the screen. Since the longitudinal direction of the ridges is aligned with the vertical direction of the screen, the view angle characteristics of the screen in a horizontal direction are improved and the diffusion characteristics of the screen in a vertical direction can be suppressed for preventing external disturbing light from an upper illumination light from being reflected toward the observers.Type: ApplicationFiled: April 27, 2004Publication date: December 2, 2004Inventors: Tomoyuki Aiura, Shuichi Yoshinaka, Takao Abumi, Haruhisa Takiguchi
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Patent number: 6653248Abstract: A semiconductor layer is co-doped with two dopants. The first dopant is to generate charge carriers in the semiconductor material, and the second dopant is to promote atomic disorder within the material. When the semiconductor material is annealed, the second dopant becomes mobile and moves through the lattice so as to promote atomic disorder. This eliminates unwanted effects such as, for example, a reduction in the forbidden bandgap that can otherwise arise as a result of atomic ordering. The amount of diffusion of the second dopant during the annealing can be increased by making the initial concentration of the second dopant non-uniform over the volume of the semiconductor material.Type: GrantFiled: June 4, 2002Date of Patent: November 25, 2003Assignee: Sharp Kabushiki KaishaInventors: Alistair Henderson Kean, Haruhisa Takiguchi
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Publication number: 20020149030Abstract: A semiconductor layer is co-doped with two dopants. The first dopant is to generate charge carriers in the semiconductor material, and the second dopant is to promote atomic disorder within the material. When the semiconductor material is annealed, the second dopant becomes mobile and moves through the lattice so as to promote atomic disorder. This eliminates unwanted effects such as, for example, a reduction in the forbidden bandgap that can otherwise arise as a result of atomic ordering. The amount of diffusion of the second dopant during the annealing can be increased by making the initial concentration of the second dopant non-uniform over the volume of the semiconductor material.Type: ApplicationFiled: June 4, 2002Publication date: October 17, 2002Inventors: Alistair Henderson Kean, Haruhisa Takiguchi
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Patent number: 6426522Abstract: A semiconductor layer is co-doped with two dopants. The first dopant is to generate charge carriers in the semiconductor material, and the second dopant is to promote atomic disorder within the material. When the semiconductor material is annealed, the second dopant becomes mobile and moves through the lattice so as to promote atomic disorder. This eliminates unwanted effects such as, for example, a reduction in the forbidden bandgap that can otherwise arise as a result of atomic ordering. The amount of diffusion of the second dopant during the annealing can be increased by making the initial concentration of the second dopant non-uniform over the volume of the semiconductor material.Type: GrantFiled: June 14, 2000Date of Patent: July 30, 2002Assignee: Sharp Kabushiki KaishaInventors: Alistair Henderson Kean, Haruhisa Takiguchi
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Patent number: 6155688Abstract: A dark field projection display includes a light source, a spatial light modulator, and an optical system for directing light from the light source onto the spatial light modulator. The optical system includes a plurality of optical subsystems and a plurality of reflectors. Each of the optical subsystems has an input aperture and is arranged to image light from the light source, the subsystems forming a spatial distribution of source images whose relative positions are different from the relative positions of the input apertures. Each of the optical subsystems further includes a plurality of reflectors disposed at the relative positions of the source images. Each of the reflectors is arranged to reflect light from a respective one of the subsystems onto the spatial light modulator.Type: GrantFiled: September 2, 1998Date of Patent: December 5, 2000Assignee: Sharp Kabushiki KaishaInventors: Duncan James Anderson, Robert George Watling Brown, Nicholas Mayhew, Michael Geraint Robinson, Jason Slack, Haruhisa Takiguchi
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Patent number: 5903585Abstract: A single cavity mode optoelectronic device, such as a VCSEL, an RCLED or a DFB laser diode, comprises an etched-pillar or mesa structure including an optically active region and strain-applying means in the form of a layer of polymer material having a coefficient of thermal expansion which is greater than that of the optically active region. The layer surrounds the optically active region so as to apply a compressive strain to the latter so as to compensate at least partially for temperature-induced changes in the gain spectrum peak of the optically active region caused by ohmic heating of the device.Type: GrantFiled: December 13, 1996Date of Patent: May 11, 1999Assignee: Sharp Kabushiki KaishaInventors: Martin David Dawson, Timothy David Bestwick, Haruhisa Takiguchi
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Patent number: 5654557Abstract: A quantum wire structure includes a first layer having a thickness sufficiently smaller than a de Broglie wavelength of an electron wave in a medium, a second layer and a third layer which are disposed on and under the first layer and respectively have a forbidden band width larger than that of the first layer, wherein the first layer has a region with a relatively small curvature and a region with a relatively large curvature in its cross-section, and a width of the region with a relatively small curvature is 50 nm or less.Type: GrantFiled: May 25, 1994Date of Patent: August 5, 1997Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research LaboratoryInventors: Mototaka Taneya, Hiroaki Kudo, Satoshi Sugahara, Haruhisa Takiguchi
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Patent number: 5477319Abstract: An optical heterodyne detection method of detecting a beat signal by heterodyne detection using a superimposition of two or more beams of light including a signal beam and a reference beam, includes the steps of: generating a scattered reference beam from the reference beam: and detecting the beat signal obtained from the scattered reference beam and the signal beam, by superimposing the scattered reference beam and the signal beam.Type: GrantFiled: December 22, 1993Date of Patent: December 19, 1995Assignee: Sharp Kabushiki KaishaInventors: Atsushi Shimonaka, Tatsuya Morioka, Mototaka Taneya, Hidenori Kawanishi, Haruhisa Takiguchi
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Patent number: 5473173Abstract: A quantum well structure is provided which is capable of efficiently confining electrons and holes in a quantum well layer. The quantum well structure includes a first cladding layer, a second cladding layer, and a plurality of quantum well layers and one or more barrier layers each disposed between the first cladding layer and the second cladding layer. The quantum well layers and the barrier layers are laminated in an alternating manner. The quantum well layers include at least two selected from the group consisting of a layer having tensile strain, a layer having no strain, and a layer having compressive strain. The thickness of each of the quantum well layers is selected so that the energy difference in each of the quantum well layers between the ground quantum state of an electron at the conduction band and the ground quantum state of a hole at the valence band is substantially the same.Type: GrantFiled: May 18, 1994Date of Patent: December 5, 1995Assignee: Sharp Kabushiki KaishaInventors: Haruhisa Takiguchi, Kousei Takahashi, Martin D. Dawson, Geoffrey Duggan
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Patent number: 5457561Abstract: A system for transmitting information with a coherent beam being propagatable in the air is arranged to include a transmitting device having a modulator and an emitting circuit and a receiving device having a generator, a mixer, a frequency discriminating circuit, and reproducing circuit. The modulator modulates a reference light frequency (wavelength) or phase of a coherent beam to be emitted from a light source according to the signal. The emitting circuit emits the modulated beam as a divergent beam having such a power density as being safe to human eyes. The generator generates a coherent locally oscillated beam. The mixer mixes the signal beam with the locally oscillated beam and photoelectric-converts the mixed beam. The frequency discriminating circuit frequency-discriminates the a.c. component of the photoelectric-converted output. The reproducing circuit reproduces a signal from the output of frequency discriminating circuit.Type: GrantFiled: August 4, 1993Date of Patent: October 10, 1995Assignee: Sharp Kabushiki KaishaInventors: Mototaka Taneya, Seiki Yano, Haruhisa Takiguchi, Atsushi Shimonaka, Tatsuya Morioka, Hidenori Kawanishi
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Patent number: 5403916Abstract: A method for producing a light emitting diode includes the steps of: forming a first semiconductor multilayer on a first semiconductor substrate having a first conductivity type; forming a light emitting layer on the first semiconductor multilayer; forming a second semiconductor multilayer; disposing a second substrate which is transparent to light emitted from the light emitting layer on the second semiconductor multilayer; and bonding the second substrate and the second semiconductor multilayer through direct bonding with heating a vicinity of an interface between the second substrate and the second semiconductor multilayer.Type: GrantFiled: February 10, 1994Date of Patent: April 4, 1995Assignee: Sharp Kabushiki KaishaInventors: Masanori Watanabe, Haruhisa Takiguchi
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Patent number: 5361271Abstract: A semiconductor laser of the present invention includes: a semiconductor substrate, a multi-layered structure formed on the semiconductor substrate and a current and light confining section formed on the multi-layered structure, wherein the current and light confining section includes at least two multi-layered current and light confining portions each having a laser beam transmission layer and a laser beam absorption layer formed on the laser beam transmission layer, and at least one stripe groove which spatially separates the at least two current and light confining portions; wherein an equivalent refractive index in the multi-layered current and light confining portions with respect to a laser beam in a fundamental transverse mode is made smaller than that within the stripe groove; wherein the multi-layered structure includes an active layer, and the active layer has a region positioned below the stripe groove of the current and light confining section and regions positioned below a respective one of the mType: GrantFiled: September 13, 1993Date of Patent: November 1, 1994Assignee: Sharp Kabushiki KaishaInventors: Haruhisa Takiguchi, Kazuhiko Inoguchi, Hiroaki Kudo, Satoshi Sugahara, Mototaka Taneya