Abstract: An A/D conversion circuit includes a reference voltage source to generate a calibration voltage, a multiplexer to receive an analog signal and the calibration voltage, and output the analog signal selected in a normal mode and the calibration voltage selected in a calibration mode or a self-diagnosis mode, an A/D converter to convert an output signal from the multiplexer into a digital signal, a non-volatile memory to hold the digital signal and calibration data, a digital calibration part to calibrate the digital signal in case of inputting the analog signal to the A/D converter in the normal mode based on the calibration data, and a self-diagnosis circuit to diagnose the A/D converter based on the digital signal in case of inputting the calibration voltage to the A/D converter in the self-diagnosis mode, and the digital signal stored in the non-volatile memory.

Abstract: An A/D conversion circuit includes a reference voltage source to generate a calibration voltage, a multiplexer to receive an analog signal and the calibration voltage, and output the analog signal selected in a normal mode and the calibration voltage selected in a calibration mode or a self-diagnosis mode, an A/D converter to convert an output signal from the multiplexer into a digital signal, a non-volatile memory to hold the digital signal and calibration data, a digital calibration part to calibrate the digital signal in case of inputting the analog signal to the A/D converter in the normal mode based on the calibration data, and a self-diagnosis circuit to diagnose the A/D converter based on the digital signal in case of inputting the calibration voltage to the A/D converter in the self-diagnosis mode, and the digital signal stored in the non-volatile memory.

Abstract: A system clock generator circuit for use in a D/A converter that allows the clock of any frequency to be inputted and also allows usage limiting-conditions to be simplified.

Abstract: An ion detector includes an ion input face, a Faraday cup, an ion-to-electron converter dynode, two ion deflection electrodes, an electron multiplier portion, and an anode. The ion input face is formed with an ion input opening. The Faraday cup has an ion collection surface that confronts the ion input opening. The ion-to-electron converter dynode is disposed to one side with respect to the Faraday cup and the ion input opening and has a conversion surface that converts impinging ions into electrons. The two ion deflection electrodes generate an electron lens that attracts and focuses ions from the ion input opening toward the conversion surface of the ion-to-electron converter dynode. The electron multiplier portion receives and multiplies the electrons from the ion-to-electron converter dynode, and includes a plurality of dynodes that multiply electrons one after the other. The plurality of dynodes are juxtaposed in an arc-shape around the Faraday cup.

Abstract: An ion detector includes an ion input face, a Faraday cup, an ion-to-electron converter dynode, two ion deflection electrodes, an electron multiplier portion, and an anode. The ion input face is formed with an ion input opening. The Faraday cup has an ion collection surface that confronts the ion input opening. The ion-to-electron converter dynode is disposed to one side with respect to the Faraday cup and the ion input opening and has a conversion surface that converts impinging ions into electrons. The two ion deflection electrodes generate an electron lens that attracts and focuses ions from the ion input opening toward the conversion surface of the ion-to-electron converter dynode. The electron multiplier portion receives and multiplies the electrons from the ion-to-electron converter dynode, and includes a plurality of dynodes that multiply electrons one after the other. The plurality of dynodes are juxtaposed in an arc-shape around the Faraday cup.

Abstract: The invention intends to reduce the manufacturing cost of the noise shaper for processing stereo signals, to reduce the occupancy area of the circuit, and to reduce the power consumption of the noise shaper. In order to process a serial digital stereo signal in time-sharing, the noise shaper takes on a construction including: a conversion means that converts the inputted stereo signals into a serial time-division-multiplexed signal; an integration means that applies a delta sigma modulation to an inputted signal, in which integrators for integrating the inputted signal are connected in multi-stages; and a means that outputs to separate a noise shaped signal into right and left channel signals. Here, the integration means possesses an adding means, two storage means to which an output from the adding means is inputted, and a selection means that selects in time-sharing either of the outputs from the two storage means. And, the output of the selection means is fed back to the adding means.

Abstract: The electron multiplying device according to this invention comprises an electron multiplying unit including dynodes arranged in a plurality of stages. The electron multiplying unit has an incidence opening for an energy beam to be multiplied to enter through, and has the proximal end secured to a base. There is provided a casing for housing the electron multiplying unit. The forward edge of the casing is secured to the base, and a space defined by the base and the casing houses the electron multiplying unit. The casing has an entrance window formed at a position opposed to the incidence opening. Energy beams enter the electron multiplying unit through the entrance window, but the electron multiplying unit itself is housed in the casing to be protected from surrounding air flow and unnecessary energy beams not to be measured.

Abstract: A variable speed tape transport apparatus for a tape cassette wherein the tape is driven at a selected one of plural predetermined speeds. The cassette includes speed indications thereon, each indication representing a respective normal tape speed. These indications are sensed by a sensor which, in turn, controls a control circuit for the tape drive motor such that the tape is selectively driven at a normal relatively lower speed or at a normal relatively higher speed. In addition, a selector mechanism, such as a fast-forward or rewind mechanism, is provided to enable the tape to be driven at a fast speed, this fast speed being at least equal to the relatively higher normal speed.In one embodiment, a tape cassette to be driven at the relatively lower normal speed can be selectively driven at a first higher speed, equal to the relatively higher normal speed, and at a second even higher speed.