Patents by Inventor Harukuni Kobari
Harukuni Kobari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8244108Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: GrantFiled: September 24, 2007Date of Patent: August 14, 2012Assignee: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Patent number: 8233776Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: GrantFiled: September 24, 2007Date of Patent: July 31, 2012Assignee: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Patent number: 8224161Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: GrantFiled: September 24, 2007Date of Patent: July 17, 2012Assignee: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Publication number: 20090028515Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: ApplicationFiled: September 24, 2007Publication date: January 29, 2009Applicant: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Publication number: 20090028514Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: ApplicationFiled: September 24, 2007Publication date: January 29, 2009Applicant: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Publication number: 20090028516Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: ApplicationFiled: September 24, 2007Publication date: January 29, 2009Applicant: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Patent number: 7289718Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: GrantFiled: September 17, 2002Date of Patent: October 30, 2007Assignee: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Patent number: 7212483Abstract: When a code word sequence is generated by converting input data words of p bits into code words of q bits and concatenating adjacent ones of the code words with a merge bit sequence of r bits in order to obtain the best DSV value, according to one aspect, the adjacent code words are concatenated with the merge bit sequence of r bits which is selected, free from the restriction of the minimum run-length of (d+1)T and the maximum run-length of (k+1)T based on the run-length limiting rule RLL(d, k) but permitting the minimum run-length of (d+1)T and the maximum run-length of (k+2)T.Type: GrantFiled: September 24, 2003Date of Patent: May 1, 2007Assignee: Victor Company of Japan, LimitedInventors: Harukuni Kobari, Toshio Kuroiwa, Hirotoshi Ohno, Hiroyoshi Yoshikawa, Nobuchika Ochi, Junzo Suzuki
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Publication number: 20040062168Abstract: When a code word sequence is generated by converting input data words of p bits into code words of q bits and concatenating adjacent ones of the code words with a merge bit sequence of r bits in order to obtain the best DSV value, according to one aspect, the adjacent code words are concatenated with the merge bit sequence of r bits which is selected, free from the restriction of the minimum run-length of (d+1)T and the maximum run-length of (k+1)T based on the run-length limiting rule RLL(d, k) but permitting the minimum run-length of (d+1)T and the maximum run-length of (k+2)T.Type: ApplicationFiled: September 24, 2003Publication date: April 1, 2004Inventors: Harukuni Kobari, Toshio Kuroiwa, Hirotoshi Ohno, Hiroyoshi Yoshikawa, Nobuchika Ochi, Junzo Suzuki
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Publication number: 20030103765Abstract: In a recording apparatus, data received as an MPEG-2 transport stream, for example from a digital broadcast or by playback of data in the D-VHS recording format, are converted to respective MPEG-2 program streams of one or more programs conveyed by the transport stream, with the program stream data being recorded, while in addition the program specific information and service information (PSI/SI information) which are received multiplexed within the transport stream are demultiplexed and also recorded.Type: ApplicationFiled: November 27, 2002Publication date: June 5, 2003Inventors: Takayuki Sugahara, Toshio Kuroiwa, Harukuni Kobari, Norihiko Fuchigami
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Publication number: 20030103766Abstract: An audio signal is compressively encoded into encoding-resultant audio data. A video signal is compressively encoded into encoding-resultant video data. An audio time stamp for audio-vide synchronous reproduction is added to every unit of the encoding-resultant audio data. A video time stamp for audio-video synchronous reproduction is added to every unit of the encoding-resultant video data. The time-stamp-added audio data and the time-stamp-added video data are multiplexed into main data. To a plurality of first after-recording-purpose data for at least one of (1) the encoding-resultant audio data and (2) the encoding-resultant video data which form the main data, time stamps for reproduction synchronous with a portion of the main data and identification information for identifying the plurality of first after-recording-purpose data are added to convert the first after-recording-purpose data into second after-recording-purpose data.Type: ApplicationFiled: September 17, 2002Publication date: June 5, 2003Inventors: Takayuki Sugahara, Norihiko Fuchigami, Harukuni Kobari, Toshio Kuroiwa
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Patent number: 6154494Abstract: Among a first and second video data each being variable length coded data such that an occupancy of a decoder buffer is neither overflown nor underflown, having an end code at a rear end thereof and being comprised of a plurality of compressed portion data, a value related to a buffer occupancy at a decoding timing of the last picture of the first video data is compared by an invalid data amount calculator 13 with the buffer occupancy at the decoding timing of the first picture of the second video data. According to a data amount corresponding to a difference between the occupancies when the result of comparison is a predetermined one, the invalid data of this data amount is added by an invalid data adder 14 to the last picture of the first video data and the second video data is connected by a video data connector 15 to the first video data.Type: GrantFiled: April 21, 1998Date of Patent: November 28, 2000Assignee: Victor Company of Japan, Ltd.Inventors: Takayuki Sugahara, Junzo Suzuki, Harukuni Kobari
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Patent number: 4637036Abstract: A circuit arrangement comprises a frequency response control circuit for controlling the level around a particular frequency of an input PCM signal in accordance with a control signal which is produced as a function of the difference between levels of positive peaks and/or negative peak corresponding to a logic bit pattern 1010 of a data synchronous signal of the PCM signal having a predetermined format. The level detection may be performed by a plurality of sample-and-hold circuits, and the difference is obtained by way of an adder-subtractor. The circuit may be arranged to constitute either a feedback loop in which level detection is effected by using a frequency response controlled PCM signal, or a feedforward system in which level detection is effected by using the input PCM signal whose frequency response has not been controlled. An output signal from the frequency response control circuit is then applied to two comparators of a conventional data acquisition circuit.Type: GrantFiled: May 18, 1984Date of Patent: January 13, 1987Assignee: Victor Company of Japan, LimitedInventor: Harukuni Kobari
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Patent number: 4604658Abstract: A random access memory has: upper and lower address limits, an address input responsive to an address counter, a write enable input, a read enable input, a data input bus, and data output bus. The address counter is supplied with a synchronization signal having a frequency determined by the frequency of a variable frequency data source. A signal having first, second and third values, respectively indicative of the address input of the memory being at the upper limit for the memory address, the lower limit for the memory address and between the upper and lower limits, is derived in response to the count in the address counter. First, second and third oscillators respectively derive first, second and third fixed frequencies such that the third frequency is greater than the second frequency and the second frequency is greater than the first frequency. The first, second and third fixed frequencies are coupled to the address counter while the signal has the third, second and first values.Type: GrantFiled: October 19, 1984Date of Patent: August 5, 1986Assignee: Victor Company of Japan, LimitedInventors: Chitoshi Hibino, Harukuni Kobari
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Patent number: 4583225Abstract: A Reed-Solomon code generator applicable to a digital signal recording/playback apparatus checks or corrects code errors in digital signals. The code generator eliminates the need for costly read only memory devices (ROM tables) and uses inexpensive registers, modulo 2 adders and multipliers instead.Type: GrantFiled: October 13, 1983Date of Patent: April 15, 1986Assignee: Victor Company of Japan, LimitedInventors: Yasuhiro Yamada, Harukuni Kobari, Hiroyuki Saito, Kohbun Sakagami, Kaoru Kobayashi
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Patent number: 4445216Abstract: A system for defeating erroneous correction in a digital signal reproducing apparatus. The system includes a reproducing circuit for reproducing a signal sequence in which information words and error correcting words are interleaved. A memory stores the reproduced digital signal sequence and produces a digital signal sequence made up of the information words and error correcting words, which are then de-interleaved and arranged in an original sequence. A correcting circuit corrects adjacent errors with respect to the digital signal sequence produced from the memory. A digital-to-analog converter converts a digital information signal obtained from the correcting circuit into an original analog information signal. The correcting circuit calculates partial syndromes according to predetermined equations and detects the number of erroneous words in one block which is made up of interleaved words.Type: GrantFiled: March 10, 1981Date of Patent: April 24, 1984Assignee: Victor Company of Japan, Ltd.Inventors: Harukuni Kobari, Yasuhiro Yamada, Susumu Suzuki, Chitoshi Hibino
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Patent number: 4420775Abstract: A circuit for protecting a horizontal synchronous signal comprises a horizontal synchronous signal detecting circuit responsive to horizontal synchronous pulses included in a composite synchronous signal of a reproduced PCM signal, first and second horizontal synchronous pulse supplementing or adding circuits and an output switching circuit. The output switching circuit operates so that the first supplementing circuit delivers a first supplementary pulse in the absence of a single pulse of the original horizontal synchronous signal, and the second supplementing circuit produces one or more second supplementary pulses in the absence of a plurality of continuous pulses of the original horizontal synchronous signal.Type: GrantFiled: September 25, 1981Date of Patent: December 13, 1983Assignees: Nippon Victor Kabushiki Kaisha, Hitachi, Ltd.Inventors: Shigeru Yamazaki, Takao Arai, Masaharu Kobayashi, Takashi Hoshino, Chitoshi Hibino, Harukuni Kobari
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Patent number: 4416010Abstract: A double error correcting system is used in a digital signal reproducing apparatus, which is capable of correcting errors in two information vectors (information words) among a plurality of information vectors within one block by use of elements in a small number of correcting matrices and by using a memory device having a small memory capacity. A register is not required for temporarily storing the operational result obtained half-way between a plurality of performed operations. Instead, corrected information vectors are obtained from a memory circuit.Type: GrantFiled: April 14, 1981Date of Patent: November 15, 1983Assignee: Victor Company of Japan, Ltd.Inventors: Chitoshi Hibino, Harukuni Kobari, Susumu Suzuki, Yasuhiro Yamada
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Patent number: 4408326Abstract: An error correcting circuit particularly for an audio equipment makes use of the so-called adjacent code correction technology and an error pointer generated by the error detection code (CRCC). The circuit comprises a counter starting to count clock pulses in response to an operation start signal, a timing signal generator for steps of correction operation, a correction operation circuit operative with the timing signal, a storage circuit for storing operation results of the correction operation circuit, a monitoring circuit for monitoring the degree of execution of the correction operation steps in the correction operation circuit, using the output of the counter and a control circuit for controlling the storage of the operation results in the storage circuit, depending upon the output of the monitoring circuit.Type: GrantFiled: September 24, 1981Date of Patent: October 4, 1983Assignees: Hitachi, Ltd., Victor Company of Japan, Ltd.Inventors: Takashi Takeuchi, Harukuni Kobari
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Patent number: 4333160Abstract: A memory control system comprises a first memory supplied with an incoming modulated digital signal which is formed by subjecting an analog signal to digital signal processing of discontinuous level modulation system, and a first control circuit for supplying a control signal to the first memory. The first control circuit producing the control signal for controlling the first memory in such a manner that the total memory capacity of the first memory is partitioned into a plurality (k) of memory capacity segments having given capacity values (lengths) for use, and the modulated digital signal is written in and further the modulated digital signal thus written in is read out with the order thereof rearranged, interrelatedly with the circulation of addresses through the plurality of divided memory capacity segments while maintaining constant the relationship in terms of capacity values (lengths) between the plurality of divided memory capacity segments.Type: GrantFiled: November 19, 1979Date of Patent: June 1, 1982Assignee: Victor Company of Japan, Ltd.Inventors: Harukuni Kobari, Yasuhiro Yamada, Susumu Suzuki, Chitoshi Hibino