Patents by Inventor Harumi Kuno

Harumi Kuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210011720
    Abstract: Methods and systems for conducting vector send operations are provided. The processor of a sender node receives a request to perform a collective send operation (e.g., MPI_Broadcast) from a user application, requesting a copy of data in one or more send buffers by sent to each of a plurality of destinations in a destination vector. The processor invokes a vector send operation from a software communications library, placing a remote enqueue atomic send command for each destination node of the destination vector in an entry of a transmit data mover (XDM) command queue in a single call. The processor executes all of the commands in the XDM command queue and writes the data in the one or more send buffers into each receive queue of each destination identified in the destination vector.
    Type: Application
    Filed: July 11, 2019
    Publication date: January 14, 2021
    Inventors: JOHN L. BYRNE, HARUMI KUNO, JEFFREY DRUMMOND
  • Publication number: 20200379858
    Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.
    Type: Application
    Filed: August 17, 2020
    Publication date: December 3, 2020
    Inventors: Cong Xu, Naveen Muralimanohar, Harumi Kuno
  • Patent number: 10776225
    Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 15, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Cong Xu, Naveen Muralimanohar, Harumi Kuno
  • Patent number: 10613949
    Abstract: In some examples, a node of a computing system may include a failure identification engine and a failure response engine. The failure identification engine may identify a failure condition for a system function of the node and the failure response engine may store a failure indication in a shared memory to trigger takeover of the system function by a different node of the computing system.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: April 7, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Charles Johnson, Harumi Kuno, Al Davis
  • Patent number: 10565037
    Abstract: A high performance computing system that includes a shared fabric memory and a plurality of processors is disclosed. A first processor is coupled to a local storage and executes a first process that, in combination with other processes, causes the plurality of processors to perform certain actions including transferring, from the shared fabric memory to the local storage, a first value corresponding to a first cell of a first set of cells and a first sweep of a stencil code. The actions further include transferring, from a first logical partition in the shared fabric memory associated with the first cell to the local storage, a second value corresponding to a second cell related to the first cell and not in the first set of cells. Further, these actions include updating, by the first process, the first value based on at least the first value and the second value.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: February 18, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Charles Johnson, Mesut Kuscu, Onkar Patil, James Hyungsun Park, Harumi Kuno, Robert Schreiber
  • Patent number: 10540227
    Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: January 21, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Charles Johnson, Onkar Patil, Mesut Kuscu, Tuan Tran, Joseph Tucek, Harumi Kuno, Milind Chabbi, William Scherer
  • Publication number: 20200004648
    Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Cong Xu, Naveen Muralimanohar, Harumi Kuno
  • Patent number: 10482013
    Abstract: Systems and methods associated with page modification are disclosed. One example method may be embodied on a non-transitory computer-readable medium storing computer-executable instructions. The instructions, when executed by a computer, may cause the computer to fetch a page to a buffer pool in a memory. The page may be fetched from at least one of a log and a backup using single page recovery. The instructions may also cause the computer to store a modification of the page to the log. The modification may be stored to the log as a log entry. The instructions may also cause the computer to evict the page from memory when the page is replaced in the buffer pool. Page writes associated with the eviction may be elided.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: November 19, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Charles S. Johnson, Harumi Kuno, Goetz Graefe, Haris Volos, Mark Lillibridge, James Hyungsun Park, Wey Guy
  • Publication number: 20190332529
    Abstract: A system includes a plurality of processes, a network fabric, and a shared memory accessible by the plurality of processes over the network fabric, the shared memory to store a plurality of elements of a data structure. A first process is designated as being allowed to update a target variable stored in the shared memory, and a second process of the plurality of processes writes a request for an atomic operation to a first region in the shared memory. The first process is responsive to the request to perform the atomic operation that updates the target variable, and write a result including a value of the updated target variable to a second region in the shared memory, the second region readable by the second process, the request and the result being elements of the data structure.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 31, 2019
    Inventors: John L. Byrne, Harumi Kuno, Khemraj Shukla, Wei Zhang
  • Patent number: 10360206
    Abstract: Systems and methods associated with latch-free searching are disclosed. One example method includes receiving a key identifying data to be retrieved from a tree-based data structure. The method also includes performing a concurrent, latch-free search of the tree-based data structure until a leaf node is reached. The method also includes validating the leaf node. The method also includes retreading a portion of the search if the leaf node fails validation.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: July 23, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Joseph Tucek, Mark Lillibridge, Harumi Kuno, Goetz Graefe
  • Publication number: 20190205205
    Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 4, 2019
    Inventors: Charles Johnson, Onkar Patil, Mesut Kuscu, Tuan Tran, Joseph Tucek, Harumi Kuno, Milind Chabbi, William Scherer
  • Publication number: 20190187924
    Abstract: A high performance computing system that includes a shared fabric memory and a plurality of processors is disclosed. A first processor is coupled to a local storage and executes a first process that, in combination with other processes, causes the plurality of processors to perform certain actions including transferring, from the shared fabric memory to the local storage, a first value corresponding to a first cell of a first set of cells and a first sweep of a stencil code. The actions further include transferring, from a first logical partition in the shared fabric memory associated with the first cell to the local storage, a second value corresponding to a second cell related to the first cell and not in the first set of cells. Further, these actions include updating, by the first process, the first value based on at least the first value and the second value.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Charles Johnson, Mesut Kuscu, Onkar Patil, James Hyungsun Park, Harumi Kuno, Robert Schreiber
  • Patent number: 10262035
    Abstract: Disclosed herein are a system, non transitory computer-readable medium, and method for estimating database performance. A request for an estimate of data is read. The estimate is calculated based at least partially on a node located in a data structure.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: April 16, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Harumi Kuno, Goetz Graefe
  • Publication number: 20190095340
    Abstract: A memory region has logical partitions. Each logical partition has data packages. The memory region discontiguously stores the data packages of the logical partitions. A writing process can discontiguously generate the data packages of the logical partitions. A reading process can contiguously retrieve the data packages of a selected logical partition.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Inventors: James Hyungsun Park, Harumi Kuno, Milind M. Chabbi, Wey Yuan Guy, Charles Stuart Johnson, Daniel Feldman, Tuan Tran, William N. Scherer, III, John L. Byrne
  • Publication number: 20190087440
    Abstract: Examples disclosed herein relate to a hierarchical file system. The hierarchical file system may include a first and a second virtual file referencing a stored data set. The first virtual file may include a set of first keys of a first level of specificity, with each key of the set of first keys including a record locator. The second virtual file may include a set of second keys referencing the data set and of a second level of specificity. The set of first keys within the first virtual file is searched in response to a query for data of the data set. A key from the set of second keys is accessed via the record locator from a key from the set of first keys where the data of the data set was not identified by the set of first keys.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 21, 2019
    Inventors: Charles Stuart Johnson, Harumi Kuno, James Park, Wey Yuan Guy, Milind M. Chabbi, Jacqueline Bredenberg, William N. Scherer, John L. Byrne, Joseph Tucek, Daniel Feldman
  • Patent number: 10133617
    Abstract: Examples include a system comprising a non-volatile memory, a cluster management interface, and a multi-node cluster. In some examples, the cluster management interface may monitor a system critical alert to determine if the system critical alert has been triggered. Based on the determination that it has been triggered, the cluster management interface may multicast a system failure notification. The multi-node cluster of the system has multiple nodes, each node connected to the non-volatile memory and having a processor and a processor cache. Each node of the multi-node cluster may determine if the system failure notification has been received and based on the determination that it has been received, each node may freeze execution of all processes on the process and flush the processor cache to the non-volatile memory.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: November 20, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Charles Stuart Johnson, Tuan Tran, Harumi Kuno
  • Publication number: 20180293144
    Abstract: In some examples, a node of a computing system may include a failure identification engine and a failure response engine. The failure identification engine may identify a failure condition for a system function of the node and the failure response engine may store a failure indication in a shared memory to trigger takeover of the system function by a different node of the computing system.
    Type: Application
    Filed: September 24, 2015
    Publication date: October 11, 2018
    Inventors: Charles Johnson, Harumi Kuno, Al Davis
  • Patent number: 9934261
    Abstract: A data processing system includes a query progress analyzer. The database processing system comprises a receiver that receives database queries including a target query directed to a database and a query analyzer. The query analyzer is coupled to the receiver and analyzes progress status of the target query based on comparison of measured target query resource usage to resource usage predicted from a query plan of the target query and measured system resource usage.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: April 3, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Harumi Kuno, Janet L. Wiener, Umeshwar Dayal, Stefan Krompass
  • Publication number: 20180004590
    Abstract: Examples include a system comprising a non-volatile memory, a cluster management interface, and a multi-node cluster. In some examples, the cluster management interface may monitor a system critical alert to determine if the system critical alert has been triggered. Based on the determination that it has been triggered, the cluster management interface may multicast a system failure notification. The multi-node cluster of the system has multiple nodes, each node connected to the non-volatile memory and having a processor and a processor cache. Each node of the multi-node cluster may determine if the system failure notification has been received and based on the determination that it has been received, each node may freeze execution of all processes on the process and flush the processor cache to the non-volatile memory.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Charles Stuart Johnson, Tuan Tran, Harumi Kuno
  • Patent number: 9836504
    Abstract: A data processing system performs query progress estimation based on processed value packets. In the illustrative data processing system, a database query processor comprises a query optimizer that creates a query plan, and a database plan executor that executes the query plan and observes intermediate result streams processed as the query plan is executed. A value packet manager anticipates value packets during query optimization, creates value packets as the intermediate result streams are processed, and compares anticipated value packets with created value packets to determine accuracy of the anticipated value packets and estimate query progress.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: December 5, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Goetz Graefe, Harumi Kuno