Abstract: One embodiment provides a system and method for predicting network power usage associated with workloads. During operation, the system configures a simulator to simulate operations of a plurality of network components, which comprises embedding one or more event counters in each simulated network component. A respective event counter is configured to count a number of network-power-related events. The system collects, based on values of the event counters, network-power-related performance data associated with one or more sample workloads applied to the simulator; and trains a machine-learning model with the collected network-power-related performance data and characteristics of the sample workloads as training data 1, thereby facilitating prediction of network-power-related performance associated with a to-be-evaluated workload.

Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.

Abstract: One embodiment provides a system and method for predicting network power usage associated with workloads. During operation, the system configures a simulator to simulate operations of a plurality of network components, which comprises embedding one or more event counters in each simulated network component. A respective event counter is configured to count a number of network-power-related events. The system collects, based on values of the event counters, network-power-related performance data associated with one or more sample workloads applied to the simulator; and trains a machine-learning model with the collected network-power-related performance data and characteristics of the sample workloads as training data 1, thereby facilitating prediction of network-power-related performance associated with a to-be-evaluated workload.

Abstract: Methods and systems for conducting vector send operations are provided. The processor of a sender node receives a request to perform a collective send operation (e.g., MPI_Broadcast) from a user application, requesting a copy of data in one or more send buffers by sent to each of a plurality of destinations in a destination vector. The processor invokes a vector send operation from a software communications library, placing a remote enqueue atomic send command for each destination node of the destination vector in an entry of a transmit data mover (XDM) command queue in a single call. The processor executes all of the commands in the XDM command queue and writes the data in the one or more send buffers into each receive queue of each destination identified in the destination vector.

Abstract: A system includes a plurality of processes, a network fabric, and a shared memory accessible by the plurality of processes over the network fabric, the shared memory to store a plurality of elements of a data structure. A first process is designated as being allowed to update a target variable stored in the shared memory, and a second process of the plurality of processes writes a request for an atomic operation to a first region in the shared memory. The first process is responsive to the request to perform the atomic operation that updates the target variable, and write a result including a value of the updated target variable to a second region in the shared memory, the second region readable by the second process, the request and the result being elements of the data structure.

Abstract: Computer-implemented systems and associated operating methods take measurements and landmarks associated with robustness maps and perform tests evaluating the robustness of a database engine's operator implementations and/or query components. The illustrative computer-implemented system comprises logic that receives one or more robustness maps of measured database system performance acquired during database execution in a predetermined range of runtime conditions and uses information from the robustness map or maps to perform regression testing wherein landmarks in the robustness maps are operated upon as a robustness bugs describing conditions under which a predetermined implementation of a database operator or query component degrades in a manner different from a predetermined expected manner.

Abstract: Methods and systems for conducting vector send operations are provided. The processor of a sender node receives a request to perform a collective send operation (e.g., MPI_Broadcast) from a user application, requesting a copy of data in one or more send buffers by sent to each of a plurality of destinations in a destination vector. The processor invokes a vector send operation from a software communications library, placing a remote enqueue atomic send command for each destination node of the destination vector in an entry of a transmit data mover (XDM) command queue in a single call. The processor executes all of the commands in the XDM command queue and writes the data in the one or more send buffers into each receive queue of each destination identified in the destination vector.

Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.

Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.

Abstract: In some examples, a node of a computing system may include a failure identification engine and a failure response engine. The failure identification engine may identify a failure condition for a system function of the node and the failure response engine may store a failure indication in a shared memory to trigger takeover of the system function by a different node of the computing system.

Abstract: A high performance computing system that includes a shared fabric memory and a plurality of processors is disclosed. A first processor is coupled to a local storage and executes a first process that, in combination with other processes, causes the plurality of processors to perform certain actions including transferring, from the shared fabric memory to the local storage, a first value corresponding to a first cell of a first set of cells and a first sweep of a stencil code. The actions further include transferring, from a first logical partition in the shared fabric memory associated with the first cell to the local storage, a second value corresponding to a second cell related to the first cell and not in the first set of cells. Further, these actions include updating, by the first process, the first value based on at least the first value and the second value.

Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.

Abstract: While scheduled checkpoints are being taken of a cluster of active compute nodes distributively executing an application in parallel, a likelihood of failure of the active compute nodes is periodically and independently predicted. Responsive to the likelihood of failure of a given active compute node exceeding a threshold, the given active compute node is proactively migrated to a spare compute node of the cluster at a next scheduled checkpoint. Another spare compute node of the cluster can perform prediction and migration. Prediction can be based on both hardware events and software events regarding the active compute nodes.

Abstract: Systems and methods associated with page modification are disclosed. One example method may be embodied on a non-transitory computer-readable medium storing computer-executable instructions. The instructions, when executed by a computer, may cause the computer to fetch a page to a buffer pool in a memory. The page may be fetched from at least one of a log and a backup using single page recovery. The instructions may also cause the computer to store a modification of the page to the log. The modification may be stored to the log as a log entry. The instructions may also cause the computer to evict the page from memory when the page is replaced in the buffer pool. Page writes associated with the eviction may be elided.

Abstract: A system includes a plurality of processes, a network fabric, and a shared memory accessible by the plurality of processes over the network fabric, the shared memory to store a plurality of elements of a data structure. A first process is designated as being allowed to update a target variable stored in the shared memory, and a second process of the plurality of processes writes a request for an atomic operation to a first region in the shared memory. The first process is responsive to the request to perform the atomic operation that updates the target variable, and write a result including a value of the updated target variable to a second region in the shared memory, the second region readable by the second process, the request and the result being elements of the data structure.

Abstract: Systems and methods associated with latch-free searching are disclosed. One example method includes receiving a key identifying data to be retrieved from a tree-based data structure. The method also includes performing a concurrent, latch-free search of the tree-based data structure until a leaf node is reached. The method also includes validating the leaf node. The method also includes retreading a portion of the search if the leaf node fails validation.

Abstract: A high performance computing system including processing circuitry and a shared fabric memory is disclosed. The processing circuitry includes processors coupled to local storages. The shared fabric memory includes memory devices and is coupled to the processing circuitry. The shared fabric memory executes a first sweep of a stencil code by sequentially retrieving data stripes. Further, for each retrieved data stripe, a set of values of the retrieved data stripe are updated substantially simultaneously. For each retrieved data stripe, the updated set of values are stored in a free memory gap adjacent to the retrieved data stripe. For each retrieved data stripe, the free memory gap is advanced to an adjacent memory location. A sweep status indicator is incremented from the first sweep to a second sweep.

Abstract: A high performance computing system that includes a shared fabric memory and a plurality of processors is disclosed. A first processor is coupled to a local storage and executes a first process that, in combination with other processes, causes the plurality of processors to perform certain actions including transferring, from the shared fabric memory to the local storage, a first value corresponding to a first cell of a first set of cells and a first sweep of a stencil code. The actions further include transferring, from a first logical partition in the shared fabric memory associated with the first cell to the local storage, a second value corresponding to a second cell related to the first cell and not in the first set of cells. Further, these actions include updating, by the first process, the first value based on at least the first value and the second value.

Abstract: Disclosed herein are a system, non transitory computer-readable medium, and method for estimating database performance. A request for an estimate of data is read. The estimate is calculated based at least partially on a node located in a data structure.

Abstract: A memory region has logical partitions. Each logical partition has data packages. The memory region discontiguously stores the data packages of the logical partitions. A writing process can discontiguously generate the data packages of the logical partitions. A reading process can contiguously retrieve the data packages of a selected logical partition.