Abstract: According to one or more embodiments of the disclosure, an apparatus comprises a plurality of core chips that includes a plurality of spiral through-substrate vias (TSVs). The core chips are stacked with one another in a face-to-face manner to define a common channel in first and second core chips, which face each other, of the plurality of core chips. The first core chip and the second core chips include a first function circuit and a second function circuit coupled to the first function circuit, respectively. The first function circuit and the second function circuit provide the same functions.

Abstract: Disclosed herein is an apparatus that includes a semiconductor substrate having a main surface extending in a first direction and a second direction different from the first direction and a conductive pattern formed over the main surface of the semiconductor substrate. The conductive pattern includes a first section extending in the first direction, a second section extending in the second direction, and a third section connected between the first and second sections. The third section of the conductive pattern has a first slit extending in a third direction different from the first and second directions.

Abstract: Disclosed herein is an apparatus that includes a semiconductor substrate having a main surface extending in a first direction and a second direction different from the first direction and a conductive pattern formed over the main surface of the semiconductor substrate. The conductive pattern includes a first section extending in the first direction, a second section extending in the second direction, and a third section connected between the first and second sections. The third section of the conductive pattern has a first slit extending in a third direction different from the first and second directions.

Abstract: Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second capacitor is sandwiched between the first and third capacitors, each of the first, second and third capacitors including first and second electrodes. The first electrodes of the first, second and third capacitors are electrically coupled in common to one another. The second electrodes of the first and third capacitors are electrically coupled in common to each other. The second electrode of the second capacitor is electrically insulated from the second electrodes of the first and third capacitors.

Abstract: Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second capacitor is sandwiched between the first and third capacitors, each of the first, second and third capacitors including first and second electrodes. The first electrodes of the first, second and third capacitors are electrically coupled in common to one another. The second electrodes of the first and third capacitors are electrically coupled in common to each other. The second electrode of the second capacitor is electrically insulated from the second electrodes of the first and third capacitors.

Abstract: Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second capacitor is sandwiched between the first and third capacitors, each of the first, second and third capacitors including first and second electrodes. The first electrodes of the first, second and third capacitors are electrically coupled in common to one another. The second electrodes of the first and third capacitors are electrically coupled in common to each other. The second electrode of the second capacitor is electrically insulated from the second electrodes of the first and third capacitors.

Abstract: Apparatuses including compensation capacitors are described. An example apparatus includes: first, second and third capacitors arranged such that the second capacitor is sandwiched between the first and third capacitors, each of the first, second and third capacitors including first and second electrodes. The first electrodes of the first, second and third capacitors are electrically coupled in common to one another. The second electrodes of the first and third capacitors are electrically coupled in common to each other. The second electrode of the second capacitor is electrically insulated from the second electrodes of the first and third capacitors.