Patents by Inventor Haruo Sumizawa

Haruo Sumizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9123795
    Abstract: A method of manufacturing semiconductor wafers which facilitates formation of orientation flat lines and allows beveling work without problems. The method of manufacturing semiconductor wafers includes steps wherein a plurality of small-diameter wafers is cut out from a large-diameter semiconductor wafer, the method including: a marking step of forming straight groove-like orientation flat lines by a laser beam so as to cross the respective small-diameter wafers in each row in the large-diameter semiconductor wafer, wherein cutout positions of the small-diameter wafers are aligned in rows in a specific direction, collectively for each of the rows; and a cutting step of cutting out the small-diameter wafers separately from the large-diameter semiconductor wafer, by a laser beam, after the marking step, in such a way that the orientation flat lines are located at required positions in the small-diameter wafers to be obtained.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: September 1, 2015
    Assignees: FUJIKOSHI MACHINERY CORP., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yoshio Nakamura, Daizo Ichikawa, Haruo Sumizawa, Shiro Hara, Sommawan Khumpuang, Shinichi Ikeda
  • Publication number: 20140154870
    Abstract: A method of manufacturing semiconductor wafers is provided which facilitates formation of orientation flat lines and allows beveling work without problems. The method of manufacturing semiconductor wafers according to the present invention is a method of manufacturing semiconductor wafers, in which a plurality of small-diameter wafers is cut out from a large-diameter semiconductor wafer, the method including: a marking step of forming straight groove-like orientation flat lines by a laser beam so as to cross the respective small-diameter wafers in each row in the large-diameter semiconductor wafer, wherein cutout positions of the small-diameter wafers are aligned in rows in a specific direction, collectively for each of the rows; and a cutting step of cutting out the small-diameter wafers separately from the large-diameter semiconductor wafer by a laser beam after the marking step.
    Type: Application
    Filed: November 22, 2013
    Publication date: June 5, 2014
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, Fujikoshi Machinery Corp.
    Inventors: Yoshio NAKAMURA, Daizo ICHIKAWA, Haruo SUMIZAWA, Shiro HARA, Sommawan KHUMPUANG, Shinichi IKEDA
  • Patent number: 6080048
    Abstract: The polishing machine of the present invention is capable of improving flatness of work pieces. In the polishing machine, a carrier is formed into a thin plate having a through-hole in which a work piece is accommodated. An upper polishing plate polishes an upper face of the work piece. A lower polishing plate pinches the work piece with the upper polishing plate and polishes a lower face of the work piece. A driving mechanism moves the carrier along a circular orbit in a plane without revolving. With this structure, the upper and lower faces of the work piece, which has been pinched between the polishing plates, are polished by the polishing plates.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: June 27, 2000
    Assignee: Fujikoshi Kikai Kogyo Kabushiki
    Inventors: Fuminari Kotagiri, Yoshio Nakamura, Yasuhide Denda, Haruo Sumizawa, Atsushi Kajikura, Satoki Kanda