Patents by Inventor Harutaka Honda

Harutaka Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090197
    Abstract: An apparatus includes: a plurality of capacitors each including first and second conductive portions and a dielectric portion therebetween; a first conductive structure containing the plurality of capacitors therein, and electrically coupled to the second conductive portions of the plurality of capacitors; a second conductive structure on a top surface of the first conductive structure; and a third conductive structure on a top surface of the second conductive structure.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Harutaka Honda, SHOGO OMIYA, SHOKO NORIFUSA, HIDEKAZU NOBUTO
  • Publication number: 20240046987
    Abstract: An apparatus includes: a first memory mat; a second memory mat adjacent to the first memory mat; a peripheral circuit between the first memory mat and the second memory mat, the peripheral circuit defining a first boundary to the first memory mat and a second boundary to the second memory mat and including a plurality of wiring patterns in a wiring layer; and at least one dummy pattern in the wiring layer arranged on or along the first boundary.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Harutaka Honda
  • Patent number: 11652048
    Abstract: A semiconductor device includes a substrate, a memory cell region, a peripheral region adjacent to the memory cell region, a plurality of word-lines extending across the memory cell region and the peripheral region, and a plurality of contacts connected to edge portions of even numbered ones of the plurality of word-lines in the peripheral region, respectively.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: May 16, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Harutaka Honda
  • Publication number: 20220293510
    Abstract: A semiconductor device includes: a substrate; a memory cell region provided over the substrate; a peripheral region provided over the substrate and adjacent to the memory cell region; a plurality of word-lines extending across the memory cell region and the peripheral region; and a plurality of contacts connected to edge portions of even numbered ones of the plurality of word-lines in the peripheral region, respectively; wherein a side of each of the edge portions of the even numbered ones of the plurality of word-lines is adjacent a portion missing an odd numbered word-line; and wherein another side of each of the edge portions of the even numbered ones of the plurality of word-lines is adjacent an offcut of another odd numbered word-line.
    Type: Application
    Filed: March 15, 2021
    Publication date: September 15, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Harutaka Honda