Abstract: A power control system, which enables more effective utilization of electrical power generated by using renewable energy, includes a monitoring unit, an output control unit, and a power storage control unit. The monitoring unit monitors the amount of electrical power generated by a power generation device using renewable energy and the amount of electrical power purchased by a consumer through utility grid. When the amount of purchased electrical power is less than a first threshold on the basis of a monitoring result of the monitoring unit, the output control unit suppresses output of electrical power generated by the power generation device. When the amount of the purchased electrical power is less than a second threshold which is greater than the first threshold on the basis of the monitoring result, the power storage control unit charges a storage battery with the generated electrical power outputted by the power generation device.

Abstract: A power storage control system reduces the operating cost in a power storage system, and comprises a monitoring section and a charge/discharge control section. The monitoring section monitors a prescribed index value that correlates with the degradation degree of a storage battery for each storage battery included in a plurality of power storage systems. The charge/discharge control section controls the period in which the prescribed index value of each storage battery changes to a prescribed value by degradation accompanying charging and discharging of the storage battery, by performing control relating to at least one of the charge amount or the charge/discharge speed in charging and discharging of the storage battery based on the monitoring results of the monitoring section.

Abstract: A power control system and method for suppressing purchase power peaks or controlling surplus power household consumption according to changes. The power control system comprises a monitoring unit, an electricity storage quantity acquisition unit, and an electricity storage controller. The monitoring unit monitors a generated power quantity which an electricity generator generates using renewable energy and a purchase power quantity which a consumer purchases via a power grid. The electricity storage controller executes processes of discharging power from an electricity storage cell if the purchase power quantity is greater than or equal to a first threshold value; charging the storage cell if the generated power quantity is greater than zero and the purchase power quantity is less than or equal to a second threshold value less than the first threshold value; and charging and discharging the storage cell such that the acquired electricity storage quantity reaches a target value.

Abstract: A power control system, which enables more effective utilization of electrical power generated by using renewable energy, includes a monitoring unit, an output control unit, and a power storage control unit. The monitoring unit monitors the amount of electrical power generated by a power generation device using renewable energy and the amount of electrical power purchased by a consumer through utility grid. When the amount of purchased electrical power is less than a first threshold on the basis of a monitoring result of the monitoring unit, the output control unit suppresses output of electrical power generated by the power generation device. When the amount of the purchased electrical power is less than a second threshold which is greater than the first threshold on the basis of the monitoring result, the power storage control unit charges a storage battery with the generated electrical power outputted by the power generation device.

Abstract: A semiconductor integrated circuit, including: a logic section; an initiating current generating section for generating initiating current for initiating or re-initiating a circuit when the circuit is to be initiated or the circuit operates abnormally; an initiating current detecting section for detecting the initiating current of the initiating current generating section and outputting a detection signal indicating whether or not the initiating current generating section operates normally; and a signal selection section for selecting one of the detection signal and an output from the logic section based on an internal signal of the logic section which is controllable from outside of the logic section, and outputting the selected one to a terminal.

Abstract: In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the semiconductor chip. Further, the first and second electrode pads are connected via metal bypass layers, respectively. In the case of wire bonding, the first and third electrode pads are used and the third electrode pads are encapsulated with an insulating layer. Further, in the case of plate wiring, the second and third electrode pads are used and the first electrode pads are covered with an insulating layer. This realizes a semiconductor chip which has great versatility and which can be used in semiconductor packages of various types.

Abstract: There is provided a non-contact IC card having a power supply circuit capable of stably receiving power even if power consumption is varied after the power supply object circuit is switched to normal operation. The non-contact IC card includes: an antenna (11) for receiving an electromagnetic wave, a rectifier circuit (12) for rectifying AC current generated from the electromagnetic wave received by the antenna (11), a regulator (13) for regulating DC voltage VIN outputted from the rectifier circuit (12), a control circuit (15) for receiving power from the regulator (13) and executing a predetermined function, and a voltage detection circuit (14) for detecting the output voltage VIN of the rectifier circuit (12). According to the result of detection of the output voltage VIN from the rectifier circuit (12), the voltage detection circuit (14) resets or releases reset of the control circuit (15).

Abstract: In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the semiconductor chip. Further, the first and second electrode pads are connected via metal bypass layers, respectively. In the case of wire bonding, the first and third electrode pads are used and the third electrode pads are encapsulated with an insulating layer. Further, in the case of plate wiring, the second and third electrode pads are used and the first electrode pads are covered with an insulating layer. This realizes a semiconductor chip which has great versatility and which can be used in semiconductor packages of various types.

Abstract: A semiconductor integrated circuit, including: a logic section; an initiating current generating section for generating initiating current for initiating or re-initiating a circuit when the circuit is to be initiated or the circuit operates abnormally; an initiating current detecting section for detecting the initiating current of the initiating current generating section and outputting a detection signal indicating whether or not the initiating current generating section operates normally; and a signal selection section for selecting one of the detection signal and an output from the logic section based on an internal signal of the logic section which is controllable from outside of the logic section, and outputting the selected one to a terminal.

Abstract: A semiconductor integrated circuit has an output end, an N-channel MOS transistor having the drain thereof connected to the output end, and a P-channel MOS transistor having the drain thereof connected to the output end. The semiconductor integrated circuit further has an operational amplifier having the non-inverting input terminal thereof connected to the output end, receiving a voltage at the inverting input terminal thereof, and having the output terminal thereof connected to the gate of the P-channel MOS transistor. In coordination with the P-channel MOS transistor, the operational amplifier operates so as to keep the voltage at the output end equal to the voltage fed thereto.

Abstract: A semiconductor integrated circuit has an output end, an N-channel MOS transistor having the drain thereof connected to the output end, and a P-channel MOS transistor having the drain thereof connected to the output end. The semiconductor integrated circuit further has an operational amplifier having the non-inverting input terminal thereof connected to the output end, receiving a voltage at the inverting input terminal thereof, and having the output terminal thereof connected to the gate of the P-channel MOS transistor. In coordination with the P-channel MOS transistor, the operational amplifier operates so as to keep the voltage at the output end equal to the voltage fed thereto.

Abstract: An electric current switch circuit in accordance with the present invention is arranged so that an output of an IIL logic circuit is connected with the base of the first transistor of NPN type that switches ON or OFF the electric current. The first constant current source and the second transistor cause the first transistor to switch ON during a period when the output of the IIL logic circuit is in an OFF state, to switch OFF during a period when the output of the IIL logic circuit is in an ON state. Thus, only a voltage of 0.9V to 1.1V (the sum of a drop voltage across the first resistor and the base-emitter voltage) is applied to the base of the first transistor. Accordingly, a voltage less than the withstand voltage of the IIL logic circuit is applied to the base of the first transistor.

Abstract: An electric current switch circuit in accordance with the present invention is arranged so that an output of an IIL logic circuit is connected with the base of the first transistor of NPN type that switches ON or OFF the electric current. The first constant current source and the second transistor cause the first transistor to switch ON during a period when the output of the IIL logic circuit is in an OFF state, while to switch OFF during a period when the output of the IIL logic circuit is in an ON state. Thus, only a voltage of 0.9V to 1.1V (the sum of a drop voltage across the first resistor and the base-emitter voltage) is applied to the base of the first transistor. Accordingly, a voltage of not more than a withstand voltage of the IIL logic circuit can be applied to the base of the first transistor.

Abstract: There is a voltage dividing circuit having a voltage dividing resistor for generating reference voltages for A/D conversion. The voltage dividing resistor further comprises a semiconductor element and, provided thereon, a resistance element, at least one capacity electrode and dielectric held therebetween. Each capacity electrode thereon is earthed. The voltage dividing resistor and the voltage dividing circuit are capable of lowering impedance of output terminals in a high frequency range, while avoiding an increase of a surface area of a chip, and undulation of impedances of output terminals in a high frequency range.

Abstract: An oscillation output generating circuit outputs a voltage V0 as an oscillation output, and a first comparing circuit compares V0 with a constant voltage V1, while a second comparing circuit compares V0 with a constant voltage V2 (<V1). In response to outputs from the first and second comparing circuits, a state maintaining circuit controls the raising/dropping of V0 through the oscillation output generating circuit. When a synchronizing pulse for synchronous oscillation is not inputted, self-advancing oscillation is started, and synchronous oscillation is started otherwise. When the synchronizing pulse is in an active state, a nullifying circuit inhibits transmission of an output from one of the first and second comparing circuits to the state maintaining circuit, whereas the nullifying circuit allows the above transmission when the synchronizing pulse is in an inactive state.