Abstract: A Magnetic-field melting preform solder that melts by action of an AC magnetic field, wherein the preform solder includes a laminated structure made up of two or more layers, at least two layers constituting the laminated structure is made up of solder material, the at least two layers do not contain ferromagnetic material, each of the at least two layers includes a surface facing with each other, and the surfaces facing with each other are in contact with each other. A bonding method using the preform solder includes a providing the preform solder between an electrode on a substrate and an electrode of an electronic component, and bonding together the electrode on the substrate and the electrode of the electronic component by generating an AC magnetic field around the substrate and thereby melting the preform solder.

Abstract: A magnetic-field melting solder that melts by the action of an AC magnetic field is provided. The magnetic-field melting solder includes solder material; and magnetic material composing of ferrite or Ni, a proportion of the magnetic material to the entire magnetic-field melting solder being 0.005% to 5% by weight. A joining method using the magnetic-field melting solder includes providing the magnetic-field melting solder between an electrode on a substrate and an electrode of an electronic component, and joining together the electrode on the substrate and the electrode of the electronic component by generating an AC magnetic field around the substrate and thereby melting the magnetic-field melting solder.

Abstract: A semiconductor device (20) has a plurality of device-side lands (23) which are disposed asymmetrically in relation to an intersection point (B). The plurality of device-side lands (23) include 45 device-side connection lands and four device-side isolation lands. Each of the device-side connection lands is mechanically connected to a printed board (10) via a connection component (30). Each of the device-side isolation lands is mechanically isolated from the printed board (10).

Abstract: A semiconductor device (20) has a plurality of device-side lands (23) which are disposed asymmetrically in relation to an intersection point (B). The plurality of device-side lands (23) include 45 device-side connection lands and four device-side isolation lands. Each of the device-side connection lands is mechanically connected to a printed board (10) via a connection component (30). Each of the device-side isolation lands is mechanically isolated from the printed board (10).

Abstract: In a case where the first component and the third component are mountable on the first circuit board pattern of the first individual board and the second component is mountable on the second circuit board pattern of the first individual board, or in a case where the first component is mountable on the first circuit board pattern of the second individual board, and the second component and the third component are mountable on the second circuit board pattern of the second individual board, in the first and second individual boards, traces for the third component are provided so that electrical connections between the third component and the other components are identical between the case where the third component is mounted on the first circuit board pattern, and the case where the third component is mounted on the second circuit board pattern.

Abstract: In a case where the first component and the third component are mountable on the first circuit board pattern of the first individual board and the second component is mountable on the second circuit board pattern of the first individual board, or in a case where the first component is mountable on the first circuit board pattern of the second individual board, and the second component and the third component are mountable on the second circuit board pattern of the second individual board, in the first and second individual boards, traces for the third component are provided so that electrical connections between the third component and the other components are identical between the case where the third component is mounted on the first circuit board pattern, and the case where the third component is mounted on the second circuit board pattern.