Patents by Inventor Haruyoshi Okada

Haruyoshi Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10695015
    Abstract: The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: June 30, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Junichi Sawada, Ryuji Kyushima, Haruyoshi Okada, Kazuki Fujita, Harumichi Mori
  • Publication number: 20190167214
    Abstract: The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.
    Type: Application
    Filed: August 9, 2017
    Publication date: June 6, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Junichi SAWADA, Ryuji KYUSHIMA, Haruyoshi OKADA, Kazuki FUJITA, Harumichi MORI
  • Patent number: 10225491
    Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: March 5, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Haruyoshi Okada, Junichi Sawada, Harumichi Mori
  • Publication number: 20170187967
    Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.
    Type: Application
    Filed: July 9, 2015
    Publication date: June 29, 2017
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji KYUSHIMA, Kazuki FUJITA, Haruyoshi OKADA, Junichi SAWADA, Harumichi MORI
  • Patent number: 9478683
    Abstract: A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: October 25, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori, Haruyoshi Okada, Junichi Sawada
  • Publication number: 20140353515
    Abstract: A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.
    Type: Application
    Filed: December 4, 2012
    Publication date: December 4, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori, Haruyoshi Okada, Junichi Sawada