Abstract: A semiconductor device composed of an E-mode transistor and a D-mode transistor and utilizing a two-dimensional electron gas, comprising: a semi-insulating substrate (41); a channel layer (42); a carrier-supply layer (43); a threshold voltage adjusting layer (44); a first etching-stoppable layer (45); an ohmic-contactable layer; a second etching-stoppable layer (49); and a contact cap layer (50), these layers being epitaxially and successively formed on the substrate (41); source and drain electrodes (60-63) formed on the contact cap layer (50); a first gate electrode (66) of the E-mode transistor formed in a first recess (57E); and a second gate electrode (67) of the D-mode transistor formed in a second recess (57D); characterized in that the device further comprises a third etching-stoppable layer (47) which is formed in the ohmic-contactable layer to divide it into an upper portion layer (48) and a lower portion layer (46) thinner than the upper layer (48).