Abstract: A Block Module for controlling a model railroad layout, the layout being subdivided into a plurality of block districts with each block district represented by one or more of the Block Modules, is a programmable processor having inputs for receiving serial data in a loop from other Block Modules and transmitting the serial data to other Block Modules, as well as inputs for receiving data from elements in the layout and information from other Block Modules and outputs for controlling elements in the layout and communication with other Block Modules. One of the Block Modules in the loop is designated as a Master Block Control Module, and the Block Modules respond to commands transmitted from the Master Block Control Module, to commands manually entered at the block district level, and to communications from related Block Modules to control the layout on a distributed basis.

Abstract: A Block Module for controlling a model railroad layout, the layout being subdivided into a plurality of block districts with each block district represented by one or more of the Block Modules, is a programmable processor having inputs for receiving serial data in a loop from other Block Modules and transmitting the serial data to other Block Modules, as well as inputs for receiving data from elements in the layout and information from other Block Modules and outputs for controlling elements in the layout and communication with other Block Modules. One of the Block Modules in the loop is designated as a Master Block Control Module, and the Block Modules respond to commands transmitted from the Master Block Control Module, to commands manually entered at the block district level, and to communications from related Block Modules to control the layout on a distributed basis.

Abstract: A graphics display unit providing rapid filling of predetermined areas of the display screen with one or more predefined repetitive patterns stored in the undisplayed portion of a frame buffer memory. The picture processor in executing a display list will encounter commands to load the predefined patterns(s) into the undisplayed portion of the frame buffer memory. The pattern is copied or replicated from there across the entire width of the frame buffer, with the final replication of the pattern being truncated. The display control unit fills the predetermined shapes or areas of the image to be displayed with the pattern(s) thusly loaded into the frame buffer memory, by copying sections of the scan lines of the replicated pattern up into the displayed section of the frame buffer specifically defining the shape to be filled-in. Pattern alignment between contiguous areas to be filled in with that pattern, is provided.

Abstract: A high speed arrangement for generating smooth lines of consistent thickness regardless of slope in a raster type display system such as a computer graphics system. A digital differential analyzer is employed for determining Y-position information to n bits of fraction for each integral step in X within a single operative clock cycle. All pixel positions are identified that are relevantly proximate to the starting end point of the line, to the concluding end point, and each one-dimensional array of at least three contiguous pixel positions encompassing a cross-section of the interior portion of the line. Intensity values are determined for each such identified pixel position based upon its distance from the true line, with the intensities of the pixel positions identified in each array being additionally determined based upon the slope of the line.