Patents by Inventor Hassan Elwan

Hassan Elwan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10877504
    Abstract: A semiconductor device includes a current source, an input/output (IO) region having a first IO device and a second IO device, and a core region having a core device. The first and second IO devices form with the current source a current mirror circuit. Each of the first and second IO devices has a first threshold voltage, and the core device has a second threshold voltage that is lower than the first threshold voltage. The first core device is coupled to the first and second IO devices and the current source and provides an offset voltage to the current source.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: December 29, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Mohamed Aboudina, Ahmed Emira, Hassan Elwan
  • Publication number: 20200328754
    Abstract: An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.
    Type: Application
    Filed: June 30, 2020
    Publication date: October 15, 2020
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, Hassan Elwan
  • Publication number: 20200274529
    Abstract: Techniques are described for implementing diodes with low threshold voltages and high breakdown voltages. Some embodiments further implement diode devices with programmable threshold voltages. For example, embodiments can couples a native device with one or more low-threshold, diode-connected devices. The coupling is such that the low-threshold device provides a low threshold voltage while being protected from breakdown by the native device, effectively manifesting as a high breakdown voltage. Some implementations include selectable branches by which the native device is programmably coupled with any of multiple low-threshold, diode-connected devices.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 27, 2020
    Inventors: Mengwen Zhang, Hassan Elwan
  • Patent number: 10742228
    Abstract: An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: August 11, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, Hassan Elwan
  • Patent number: 10735017
    Abstract: A successive approximation register (SAR) analog to digital converter (ADC) is disclosed. The SAR ADC includes: a DAC, configured to receive an analog input voltage and a digital input word, and to generate a first voltage. The SAR ADC also includes a comparator, configured to generate a second voltage based on the first voltage and a reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The SAR ADC also includes an SAR logic circuit configured to receive the second voltage from the comparator, and to generate the digital input word for the DAC. The SAR logic is further configured to generate a digital output word representing the value of the analog input voltage, where the digital output word of the SAR logic has a greater number of bits than the digital input word of the DAC.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: August 4, 2020
    Assignee: GOODIX TECHNOLOGY INC.
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, Hassan Elwan
  • Patent number: 10727857
    Abstract: An ADC is disclosed. The ADC includes a SAR logic circuit, a DAC, a comparator, and a voltage generator. The voltage generator includes a first switch connected to the comparator configured to selectively connect a second input terminal of the comparator to a reference voltage, a capacitor connected to the second input terminal of the comparator, and a second switch connected to the capacitor and selectively connected to either of a ground voltage and the reference voltage. The second switch is configured to selectively connect the capacitor to either of the ground voltage and the reference voltage, and the SAR logic circuit is further configured to receive the comparator output voltage, and to generate a digital input word for the DAC based on one or more comparator output voltages received from the comparator.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: July 28, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, Hassan Elwan
  • Patent number: 10630305
    Abstract: A self-calibrating analog-to-digital converter includes a reference signal circuit configured to provide a reference signal, an analog-to-digital converter configured to generate a first digital representation of the reference signal, a dual-slope analog-to-digital converter configured to generate a second digital representation of the reference signal, and a digital engine configured to compare the first digital representation with the second digital representation to obtain a difference and output a calibration signal to the analog-to-digital converter in response to the difference. The reference signal circuit, the analog-to-digital converter, the dual-slop analog-to-digital converter, and digital engine are integrated in an integrated circuit.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: April 21, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ali Farid, Ahmed Emira, Hassan Elwan
  • Publication number: 20200014396
    Abstract: An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.
    Type: Application
    Filed: August 5, 2019
    Publication date: January 9, 2020
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, HASSAN ELWAN
  • Publication number: 20200007143
    Abstract: An ADC is disclosed. The ADC includes a SAR logic circuit, a DAC, a comparator, and a voltage generator. The voltage generator includes a first switch connected to the comparator configured to selectively connect a second input terminal of the comparator to a reference voltage, a capacitor connected to the second input terminal of the comparator, and a second switch connected to the capacitor and selectively connected to either of a ground voltage and the reference voltage. The second switch is configured to selectively connect the capacitor to either of the ground voltage and the reference voltage, and the SAR logic circuit is further configured to receive the comparator output voltage, and to generate a digital input word for the DAC based on one or more comparator output voltages received from the comparator.
    Type: Application
    Filed: September 4, 2019
    Publication date: January 2, 2020
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, HASSAN ELWAN
  • Publication number: 20190384343
    Abstract: A semiconductor device includes a current source, an input/output (IO) region having a first IO device and a second IO device, and a core region having a core device. The first and second IO devices form with the current source a current mirror circuit. Each of the first and second IO devices has a first threshold voltage, and the core device has a second threshold voltage that is lower than the first threshold voltage. The first core device is coupled to the first and second IO devices and the current source and provides an offset voltage to the current source.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Inventors: Mohamed Aboudina, Ahmed Emira, Hassan Elwan
  • Publication number: 20190372582
    Abstract: A successive approximation register (SAR) analog to digital converter (ADC) is disclosed. The SAR ADC includes: a DAC, configured to receive an analog input voltage and a digital input word, and to generate a first voltage. The SAR ADC also includes a comparator, configured to generate a second voltage based on the first voltage and a reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The SAR ADC also includes an SAR logic circuit configured to receive the second voltage from the comparator, and to generate the digital input word for the DAC. The SAR logic is further configured to generate a digital output word representing the value of the analog input voltage, where the digital output word of the SAR logic has a greater number of bits than the digital input word of the DAC.
    Type: Application
    Filed: May 31, 2018
    Publication date: December 5, 2019
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, Hassan Elwan
  • Publication number: 20190372583
    Abstract: An ADC, including a DAC which receives an analog input voltage and a digital input word from SAR logic, and generates a first voltage based on the analog input voltage and the digital word. The ADC also includes a comparator, which receives the first voltage and a reference voltage, and generates a second voltage based on the first voltage and on the reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The ADC also includes the SAR logic circuit which receives the second voltage from the comparator. The SAR logic generates a digital output word based on a second voltages received from the comparator. A difference between the minimum input voltage on the maximum input voltage is substantially equal to two times a difference between reference voltage and the minimum input voltage.
    Type: Application
    Filed: April 29, 2019
    Publication date: December 5, 2019
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, HASSAN ELWAN
  • Patent number: 10498317
    Abstract: Various arrangements for decreasing harmonics of an output digital signal are presented. A programmable current rise-time circuit may be present that controls a rising edge of the output digital signal, wherein the output digital signal is output to an input/output (I/O) pad. A programmable current fall-time circuit may be present that controls a falling edge of the output digital signal. A feedback circuit may be present that monitors a rise-time of the rising edge of the output digital signal and fall-time of the falling edge of the output digital signal. A control circuit may be present that provides a first input to the programmable current rise-time circuit to adjust the rise-time of the rising edge of the output digital signal and a second input to the programmable current fall-time circuit to adjust the fall-time of the falling edge of the output.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 3, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Hassan Elwan
  • Patent number: 10491232
    Abstract: An ADC, including a DAC which receives an analog input voltage and a digital input word from SAR logic, and generates a first voltage based on the analog input voltage and the digital word. The ADC also includes a comparator, which receives the first voltage and a reference voltage, and generates a second voltage based on the first voltage and on the reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The ADC also includes the SAR logic circuit which receives the second voltage from the comparator. The SAR logic generates a digital output word based on a second voltages received from the comparator. A difference between the minimum input voltage on the maximum input voltage is substantially equal to two times a difference between reference voltage and the minimum input voltage.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: November 26, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, Hassan Elwan
  • Patent number: 10461767
    Abstract: An ADC is disclosed. The ADC includes a SAR logic circuit, a DAC, a comparator, and a voltage generator. The voltage generator includes a first switch connected to the comparator configured to selectively connect a second input terminal of the comparator to a reference voltage, a capacitor connected to the second input terminal of the comparator, and a second switch connected to the capacitor and selectively connected to either of a ground voltage and the reference voltage. The second switch is configured to selectively connect the capacitor to either of the ground voltage and the reference voltage, and the SAR logic circuit is further configured to receive the comparator output voltage, and to generate a digital input word for the DAC based on one or more comparator output voltages received from the comparator.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: October 29, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, Hassan Elwan
  • Patent number: 10429877
    Abstract: A current reference circuit includes a current source, a first p-channel metal oxide semiconductor (PMOS) transistor having a source coupled to a first supply voltage, a gate, and a drain coupled to the current source, and an n-channel MOS (NMOS) transistor having a drain coupled to a second supply voltage, a gate coupled to the drain of the first PMOS transistor. The current reference circuit also includes a first resistive element having a first terminal coupled to a source of the NMOS transistor and a gate of the first PMOS transistor and a second terminal coupled to a ground potential, a second PMOS transistor having a drain coupled to the first supply voltage, and a second resistive element having a first terminal coupled to the first terminal of the first resistive element and a second terminal coupled to the gate of the second PMOS transistor.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: October 1, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Mohamed Aboudina, Ahmed Emira, Hassan Elwan
  • Patent number: 10432213
    Abstract: An analog to digital converter (ADC) is disclosed. The ADC includes a DAC which generates a first signal based on an analog input and a digital input word, and a comparator which generates a comparator output having a value corresponding with a sign of a difference between first and second signals. During a first time period, the second signal is equal to a reference signal, the first signal is equal to an analog input, and the comparator generates a first comparator output. During a second time period, the second signal is equal to the reference signal, the first signal is equal to a the analog input plus a predetermined signal, and the comparator generates a second comparator output. A SAR logic circuit generates the digital input word for the DAC based on the first and second comparator outputs.
    Type: Grant
    Filed: July 8, 2018
    Date of Patent: October 1, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Mohamed Aboudina, Ali Farid, Ahmed Emira, Hassan Elwan
  • Publication number: 20190222218
    Abstract: A self-calibrating analog-to-digital converter includes a reference signal circuit configured to provide a reference signal, an analog-to-digital converter configured to generate a first digital representation of the reference signal, a dual-slope analog-to-digital converter configured to generate a second digital representation of the reference signal, and a digital engine configured to compare the first digital representation with the second digital representation to obtain a difference and output a calibration signal to the analog-to-digital converter in response to the difference. The reference signal circuit, the analog-to-digital converter, the dual-slop analog-to-digital converter, and digital engine are integrated in an integrated circuit.
    Type: Application
    Filed: September 25, 2018
    Publication date: July 18, 2019
    Inventors: Ali Farid, Ahmed Emira, HASSAN ELWAN
  • Patent number: 10291213
    Abstract: Various arrangements for decreasing harmonics of an output digital signal are presented. A programmable current rise-time circuit may be present that controls a rising edge of the output digital signal, wherein the output digital signal is output to an input/output (I/O) pad. A programmable current fall-time circuit may be present that controls a falling edge of the output digital signal. A feedback circuit may be present that monitors a rise-time of the rising edge of the output digital signal and fall-time of the falling edge of the output digital signal. A control circuit may be present that provides a first input to the programmable current rise-time circuit to adjust the rise-time of the rising edge of the output digital signal and a second input to the programmable current fall-time circuit to adjust the fall-time of the falling edge of the output digital signal.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: May 14, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Hassan Elwan
  • Patent number: 10291252
    Abstract: An ADC, including a DAC which receives an analog input voltage and a digital input word from SAR logic, and generates a first voltage based on the analog input voltage and the digital word. The ADC also includes a comparator, which receives the first voltage and a reference voltage, and generates a second voltage based on the first voltage and on the reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The ADC also includes the SAR logic circuit which receives the second voltage from the comparator. The SAR logic generates a digital output word based on a second voltages received from the comparator. A difference between the minimum input voltage on the maximum input voltage is substantially equal to two times a difference between reference voltage and the minimum input voltage.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: May 14, 2019
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ali Farid, Ahmed Emira, Mohamed Aboudina, Hassan Elwan