Patents by Inventor Hassan M. Hanjani

Hassan M. Hanjani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6885215
    Abstract: A voltage detector including a voltage following circuit connected to a power supply and operable to follow a voltage value of the power supply, a selectable threshold point circuit connected to the voltage following circuit and operable to select one of a plurality of values for a threshold point of the power supply, and a switch circuit coupled to the selectable threshold point circuit and the voltage following circuit, the switch circuit cooperating with the selectable threshold point circuit to generate an output indicating whether the value of the power supply has increased above or decreased below the selected value for the threshold point in response to the followed value of the power supply.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: April 26, 2005
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Hungyu H. Hou, Hassan M. Hanjani, A. Karl Rapp
  • Patent number: 6373256
    Abstract: A low battery detect circuit with digitally programmable detect levels. The programmable low battery detect circuit includes a comparator that compares a stable reference voltage against a battery-supplied voltage as divided down by a digitally programmable resistive divider chain. By programmably varying the resistance of the divider chain, the low battery detect threshold level can be varied depending on the requirements of the application.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: April 16, 2002
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Hassan M. Hanjani, Hungyu Howard Hou, Charles Watts, Jr.
  • Patent number: 4833651
    Abstract: A No-Fall-Through, FIFO memory includes a memory section comprising a plurality of locations for storing data words. Data words are written into the storage locations in response to a write clock input signal. Data words are read from the storage locations, in the same sequence as previously written, in response to a read clock signal. A write pointer maintains a write pointer value indicative of the number of data words which have been written. A read pointer maintains a read pointer value indicative of the number of data words which have been read. A comparator monitors the write pointer and read pointer values and detects differences between the two. The characteristics of the differences are utilized to control internal operations of the FIFO.
    Type: Grant
    Filed: July 24, 1986
    Date of Patent: May 23, 1989
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey H. Seltzer, Hassan M. Hanjani