Patents by Inventor HASSAN SHARGHI

HASSAN SHARGHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chopper based relaxation oscillator
    Patent number: 8736387
    Abstract: A reference circuit, an oscillator architecture that includes the reference circuit and a method for operating the reference circuit are described. In one embodiment, the reference circuit includes a voltage reference generator configured to generate a reference voltage and a current reference generator configured to generate a reference current based on the reference voltage. The current reference generator includes a level shifter circuit configured to generate intermediate voltages based on the reference voltage, a first current reference circuit configured to generate intermediate currents based on the intermediate voltages, where the intermediate currents are correlated to the reference voltage, and a second current reference circuit configured to combine the intermediate currents to generate the reference current. Other embodiments are also described.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: May 27, 2014
    Assignee: NXP B.V.
    Inventors: Kevin Mahooti, Min Ming Tarng, Jason Sharma, Hassan Sharghi, Himanshu Sharma, Amjad Nezami
  • CHOPPER BASED RELAXATION OSCILLATOR
    Publication number: 20140028409
    Abstract: A reference circuit, an oscillator architecture that includes the reference circuit and a method for operating the reference circuit are described. In one embodiment, the reference circuit includes a voltage reference generator configured to generate a reference voltage and a current reference generator configured to generate a reference current based on the reference voltage. The current reference generator includes a level shifter circuit configured to generate intermediate voltages based on the reference voltage, a first current reference circuit configured to generate intermediate currents based on the intermediate voltages, where the intermediate currents are correlated to the reference voltage, and a second current reference circuit configured to combine the intermediate currents to generate the reference current. Other embodiments are also described.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: NXP B.V.
    Inventors: KEVIN MAHOOTI, MIN MING TARNG, JASON SHARMA, HASSAN SHARGHI, HIMANSHU SHARMA, AMJAD NEZAMI