Abstract: A method for operating a DC-DC converter circuit includes, in response to detecting a startup condition, charging an output capacitance coupled to an output node of the DC-DC converter circuit at a first rate in a first phase of a multi-phase startup mode of operation of the DC-DC converter circuit. The method includes, in response to an indication of an output voltage on the output node approaching an input voltage on an input node of the DC-DC converter circuit, controlling a current through an inductor using an oscillating signal in a second phase of the multi-phase startup mode of operation, thereby adjusting the output voltage to equal a target voltage level. The first rate may be the rate of charging an RC circuit including the output capacitance coupled to the output node.

Abstract: A method for operating a DC-DC converter includes generating an output voltage on an output node of the DC-DC converter based on an input voltage on an input node of the DC-DC converter using a transistor having a bulk terminal and a gate terminal, the output voltage being greater than the input voltage. The method includes coupling the input node to the bulk terminal and the gate terminal in response to the output voltage being less than the input voltage. The method includes coupling the output node to the bulk terminal in response to the output voltage exceeding the input voltage or a predetermined threshold voltage.

Abstract: A physically unclonable function (PUF) includes a bit cell that includes a latch and a switch to selectively couple the latch to a supply voltage node. A first transmission gate couples a first bit line to a first internal node of the latch and a second transmission gate couples a second bit line to a second internal node of the latch. A digital to analog converter (DAC) circuit is selectively coupled to the first internal node through the first bit line and the first transmission gate and to the second internal node through the second bit line and the second transmission gate, to thereby precharge the latch before the first bit cell is read. The latch regenerates responsive to the switch being closed to connect the latch to the supply voltage node. The first and second bit lines are used to read the regenerated value of the latch.

Abstract: A physically unclonable function (PUF) includes a bit cell that includes a latch and a switch to selectively couple the latch to a supply voltage node. A first transmission gate couples a first bit line to a first internal node of the latch and a second transmission gate couples a second bit line to a second internal node of the latch. A digital to analog converter (DAC) circuit is selectively coupled to the first internal node through the first bit line and the first transmission gate and to the second internal node through the second bit line and the second transmission gate, to thereby precharge the latch before the first bit cell is read. The latch regenerates responsive to the switch being closed to connect the latch to the supply voltage node. The first and second bit lines are used to read the regenerated value of the latch.