Patents by Inventor Hau-Yiu Tsui

Hau-Yiu Tsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • OP-AMP sharing technique to remove memory effect in pipelined circuit
    Patent number: 9154091
    Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: October 6, 2015
    Assignee: Microchip Technologies, Inc.
    Inventors: Louis Hau-Yiu Tsui, Isaac Terasuth Ko
  • OP-AMP Sharing Technique to Remove Memory Effect in Pipelined Circuit
    Publication number: 20140097897
    Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.
    Type: Application
    Filed: September 12, 2013
    Publication date: April 10, 2014
    Applicant: Supertex, Inc.
    Inventors: Louis Hau-Yiu TSUI, Isaac Terasuth Ko
  • Process independent voltage controlled logarithmic attenuator having a low distortion and method therefor
    Patent number: 7453307
    Abstract: A process independent voltage controlled logarithmic attenuator has an attenuator control stage block having a first input coupled to a controlled input and a second input coupled to an offset generator. An attenuator transistor is coupled to the attenuator controlled stage block. An output of the attenuator controlled stage block is both slope and maximum voltage definable for a process independent design.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: November 18, 2008
    Assignee: Supertex, Inc.
    Inventors: Wilson Wai-Sum Chan, Hau-Yiu Tsui, Ka-Wai Ho, Isacc Terasuth Ko
  • Process independent voltage controlled logarithmic attenuator having a low distortion and method therefor
    Publication number: 20060186944
    Abstract: A process independent voltage controlled logarithmic attenuator has an attenuator control stage block having a first input coupled to a controlled input and a second input coupled to an offset generator. An attenuator transistor is coupled to the attenuator controlled stage block. An output of the attenuator controlled stage block is both slope and maximum voltage definable for a process independent design.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 24, 2006
    Inventors: Wilson Chan, Hau-Yiu Tsui, Ka-Wai Ho, Isacc Ko