Abstract: A method of manufacturing a semiconductor element includes forming a mask on a front surface of a substrate, the mask having an opening to expose the front surface; growing a first semiconductor layer by epitaxially growing a semiconductor along the mask, starting from the front surface exposed through the opening, and growing a second semiconductor layer on a surface of the first semiconductor layer located opposite to the substrate in a layering direction, and providing an electrode on a surface of the second semiconductor layer located opposite to the surface of the first semiconductor layer in the layering direction. A width from an end portion of the surface to the electrode is smaller than a width of the mask.

Abstract: According to one embodiment, a semiconductor memory device comprises a first memory cell array including a first block and a second block, the first block including a first memory cell, and the second block including a second memory cell; and a controller that performs, in a first period of time in writing, a first program in the first memory cell and the second memory cell.

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell, a bit line, a sense amplifier, a word line, and a row decoder. A write operation repeats a program loop including a program operation, first and second verify operations. The row decoder applies a first read voltage to the word line in the first and second verify operations. When the write operation is not suspended, the sense amplifier senses a voltage of the bit line for a first sense period in the first verify operation. When the write operation is suspended, the sense amplifier senses the voltage of the bit line for a second sense period shorter than the first sense period in the initial first verify operation after a resumption of the write operation.

Abstract: According to one embodiment, a semiconductor memory device comprises a first memory cell array including a first block and a second block, the first block including a first memory cell, and the second block including a second memory cell; and a controller that performs, in a first period of time in writing, a first program in the first memory cell and the second memory cell.

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell, a bit line, a sense amplifier, a word line, and a row decoder. A write operation repeats a program loop including a program operation, first and second verify operations. The row decoder applies a first read voltage to the word line in the first and second verify operations. When the write operation is not suspended, the sense amplifier senses a voltage of the bit line for a first sense period in the first verify operation. When the write operation is suspended, the sense amplifier senses the voltage of the bit line for a second sense period shorter than the first sense period in the initial first verify operation after a resumption of the write operation.