Patents by Inventor Hayato KOHATA

Hayato KOHATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180254359
    Abstract: A solar cell includes an n-type semiconductor substrate having a p-n junction and a back-surface side impurity-diffusion layer. The back-surface side impurity-diffusion layer is formed on a light-receiving surface of the semiconductor substrate or surface layer on a back-surface side opposite to the light-receiving surface, and has back-surface side high-concentration impurity-diffusion layers each of which contains an n-type or p-type impurity element at a first concentration and a back-surface side low-concentration impurity-diffusion layer which contains an impurity element of the same conductivity type as a conductivity type of the back-surface side high-concentration impurity-diffusion layers at a second concentration lower than the first concentration.
    Type: Application
    Filed: August 28, 2015
    Publication date: September 6, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Hayato KOHATA
  • Patent number: 9997650
    Abstract: A solar cell includes: a first-conductivity-type semiconductor substrate that includes an impurity diffusion layer on one surface side, which is a light receiving surface side, the impurity diffusion layer having a second-conductivity-type impurity element diffused therein; a plurality of linear light-receiving-surface-side electrodes that are a paste electrode that has a multi-layered structure, is formed by multi-layer printing of an electrode material paste on the one surface side, and is electrically connected to the impurity diffusion layer and that extend in parallel in a specific direction in a plane direction of the semiconductor substrate; and a back-surface-side electrode that is formed on another surface side of the semiconductor substrate. In the light-receiving-surface-side electrodes, the light-receiving-surface-side electrodes get smaller in width as they get closer in a width direction of the light-receiving-surface-side electrodes to a specific reference position.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: June 12, 2018
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Norihiro Tamura, Hayato Kohata, Atsuro Hama
  • Publication number: 20180122980
    Abstract: A solar cell includes a p-type impurity diffusion layer formed on one side of an n-type single-crystal silicon substrate, an n-type impurity diffusion layer formed on the opposite side of the substrate with an n-type impurity element at a higher concentration than the substrate, and having a first layer with an n-type impurity element diffused at a first concentration, and a second layer with an n-type impurity element diffused at a second concentration lower than the first concentration, on-p-type-impurity-diffusion-layer electrodes formed on the p-type impurity diffusion layer, and on-n-type-impurity-diffusion-layer electrodes formed on the first layer. The concentration of the n-type impurity element at a surface of the first layer is between 5×1020 atoms/cm3 and 2×1021 atoms/cm3 inclusive, and the concentration of the n-type impurity element at a surface of the second layer is between 5×1019 atoms/cm3 and 2×1020 atoms/cm3 inclusive.
    Type: Application
    Filed: July 2, 2015
    Publication date: May 3, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroaki MORIKAWA, Atsuro HAMA, Hayato KOHATA, Shintaro KANO
  • Patent number: 9685581
    Abstract: A manufacturing method of a solar cell having diffusion layers of different conductivity types on a front surface of a semiconductor substrate and a back surface thereof, respectively, includes a step of forming a diffusion protection mask containing impurities to cover at least a partial region of the semiconductor substrate, and a diffusion step of performing a diffusion step including a thermal step in a state where at least the partial region of the semiconductor substrate is covered with the diffusion protection mask containing impurities, forming a first-impurity diffusion layer in a first region covered with the diffusion protection mask, and forming a second-impurity diffusion layer having a different impurity concentration or a different conductivity type from that of the diffusion protection mask in a second region exposed from the diffusion protection mask.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: June 20, 2017
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Hayato Kohata
  • Publication number: 20170025561
    Abstract: When a high-concentration diffusion layer is formed in part of a first surface of a substrate in which a diffusion layer of the light receiving surface is formed, the thermal oxidation is performed in a state where a diffusion source is formed, thereby introducing the impurity in the outermost surface of the diffusion layer of the light receiving surface into a thermal oxide film. Consequently, the outermost surface of the diffusion layer of the light receiving surface has an impurity concentration lower than that on the inner side.
    Type: Application
    Filed: April 4, 2014
    Publication date: January 26, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hayato KOHATA
  • Publication number: 20160260852
    Abstract: A solar cell includes: a first-conductivity-type semiconductor substrate that includes an impurity diffusion layer on one surface side, which is a light receiving surface side, the impurity diffusion layer having a second-conductivity-type impurity element diffused therein; a plurality of linear light-receiving-surface-side electrodes that are a paste electrode that has a multi-layered structure, is formed by multi-layer printing of an electrode material paste on the one surface side, and is electrically connected to the impurity diffusion layer and that extend in parallel in a specific direction in a plane direction of the semiconductor substrate; and a back-surface-side electrode that is formed on another surface side of the semiconductor substrate. In the light-receiving-surface-side electrodes, the light-receiving-surface-side electrodes get smaller in width as they get closer in a width direction of the light-receiving-surface-side electrodes to a specific reference position.
    Type: Application
    Filed: November 7, 2013
    Publication date: September 8, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Norihiro TAMURA, Hayato KOHATA, Atsuro HAMA
  • Publication number: 20160233353
    Abstract: An n-type impurity diffusion layer includes a plurality of linear first n-type impurity diffusion layers and a second n-type impurity diffusion layer. The first n-type impurity diffusion layers extend in parallel in a specific direction, are disposed in a lower region under surface silver grid electrodes and a peripheral region that extends from the lower region, and contain an impurity element at a first concentration. The second n-type impurity diffusion layer contains the impurity element at a second concentration, which is lower than the first concentration. In the first n-type impurity diffusion layers, the first n-type impurity diffusion layers get smaller in width as they get closer in a width direction of the first n-type impurity diffusion layers to a specific reference position.
    Type: Application
    Filed: November 7, 2013
    Publication date: August 11, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Norihiro TAMURA, Hayato KOHATA, Atsuro HAMA
  • Publication number: 20160072003
    Abstract: A manufacturing method of a solar cell having diffusion layers of different conductivity types on a front surface of a semiconductor substrate and a back surface thereof, respectively, includes a step of forming a diffusion protection mask containing impurities to cover at least a partial region of the semiconductor substrate, and a diffusion step of performing a diffusion step including a thermal step in a state where at least the partial region of the semiconductor substrate is covered with the diffusion protection mask containing impurities, forming a first-impurity diffusion layer in a first region covered with the diffusion protection mask, and forming a second-impurity diffusion layer having a different impurity concentration or a different conductivity type from that of the diffusion protection mask in a second region exposed from the diffusion protection mask.
    Type: Application
    Filed: April 24, 2013
    Publication date: March 10, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Hayato KOHATA