Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: An electronic device includes a power supply circuit, a first counter that counts the number of times that supply of external power to the power supply circuit is stopped, a second counter that is operated by a first power and counts the number of times that generation of the plurality of kinds of power is stopped, a third counter counting the number of times that any of the plurality of kinds of power is dropped to a predetermined voltage or less, a non-volatile first memory storing status information indicating whether or not supply of the external power to the power supply circuit is properly stopped, and a fourth counter that counts the number of times that the supply of the external power to the power supply circuit is properly stopped and the number of times that the supply of the external power to the power supply circuit is abnormally stopped.

Abstract: A memory system according to at least one embodiment includes a semiconductor storage device and a controller. The semiconductor storage device includes an output transistor and a circuit for changing a magnitude of a current of the output transistor. The controller receives a signal output from the semiconductor storage device via the output transistor, and controls the circuit based on a level of the received signal.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a controller acquires temperature data periodically while receiving a first mode designating signal, writes the temperature data into a nonvolatile storage while or after the first mode designating signal, acquires temperature data after a lapse of a predetermined time from designation of the second mode, writes the temperature data into the nonvolatile storage while or after a lapse of a predetermined time since the designation of the second mode, acquires temperature data at a timing of changing from the second mode to the first mode, and write the acquired temperature data into the nonvolatile storage at or after the timing of changing from the second mode to the first mode.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: An electronic device includes a power supply circuit, a first counter that counts the number of times that supply of external power to the power supply circuit is stopped, a second counter that is operated by a first power and counts the number of times that generation of the plurality of kinds of power is stopped, a third counter counting the number of times that any of the plurality of kinds of power is dropped to a predetermined voltage or less, a non-volatile first memory storing status information indicating whether or not supply of the external power to the power supply circuit is properly stopped, and a fourth counter that counts the number of times that the supply of the external power to the power supply circuit is properly stopped and the number of times that the supply of the external power to the power supply circuit is abnormally stopped.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a controller acquires temperature data periodically while receiving a first mode designating signal, writes the temperature data into a nonvolatile storage while or after the first mode designating signal, acquires temperature data after a lapse of a predetermined time from designation of the second mode, writes the temperature data into the nonvolatile storage while or after a lapse of a predetermined time since the designation of the second mode, acquires temperature data at a timing of changing from the second mode to the first mode, and write the acquired temperature data into the nonvolatile storage at or after the timing of changing from the second mode to the first mode.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Abstract: A semiconductor device includes a substrate having a connector for connection with a host, a semiconductor memory device mounted on the substrate, a temperature sensor mounted on the substrate, and a controller mounted on the substrate. The controller is configured to write, in the semiconductor memory device, write data received through the connector together with temperature data representing temperature detected by the temperature sensor.

Abstract: A semiconductor device includes a substrate having a connector for connection with a host, a semiconductor memory device mounted on the substrate and including a plurality of memory cells, a temperature sensor mounted on the substrate, and a controller mounted on the substrate. The controller is configured to determine a number of bits per memory cell by which data are to be written in the semiconductor memory device, based on a temperature detected by the temperature sensor, and write the data in the semiconductor memory device by the determined number of bits per memory cell.

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.