Abstract: A phase-change channel transistor includes a first electrode; a second electrode; a memory layer provided between the first and second electrodes; and a third electrode provided for the memory layer with an insulating film interposed therebetween, wherein the memory layer includes at least a first layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature and a second layer formed from a resistive material, and wherein the resistance value of the second layer is smaller than the resistance value of the first layer in the amorphous phase, but is larger than the resistance value of the first layer in the crystalline phase.

Abstract: A phase-change channel transistor includes a first electrode; a second electrode; a memory layer provided between the first and second electrodes; and a third electrode provided for the memory layer with an insulating film interposed therebetween, wherein the memory layer includes at least a first layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature and a second layer formed from a resistive material, and wherein the resistance value of the second layer is smaller than the resistance value of the first layer in the amorphous phase, but is larger than the resistance value of the first layer in the crystalline phase.

Abstract: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.

Abstract: To reduce the voltage required to cause a phase transition from an amorphous phase to a crystalline phase, a phase-change memory device (1) comprises: a first electrode (6); a second electrode (8); and a memory layer (14) provided between the first (6) and second (8) electrodes, wherein the memory layer (14) includes at least a first layer (10) formed from a phase-change material which is stable in either the amorphous phase or the crystalline phase at room temperature, and a second layer (12) formed from a resistive material, and wherein the resistance value of the second layer (12) is smaller than the resistance value of the first layer (10) in the amorphous phase, but is larger than the resistance value of the first layer (10) in the crystalline phase.

Abstract: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.

Abstract: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.

Abstract: A cantilever type sensor includes a cantilever, an actuator that oscillates the cantilever, and a sensor provided at the cantilever so as to detect an oscillation condition of the cantilever. Further, the cantilever type sensor includes a control unit that controls the actuator so as to cause the cantilever to be subjected to pulse excitation, and a measurement unit that measures a physical quantity related to a measurement object, based on a change in pulse response detected in the sensor.

Abstract: Minute masses of a plurality of measuring objects are measured at a time. A multi-lever is prepared, in which a plurality of cantilevers, each having a buried piezoresistance element, is provided. Different measuring object attracting substances are coated on the multi-lever. The multi-lever is driven by a single vibration exciting device. The vibrational frequency is swept within a predetermined range, and the resonance frequency of each cantilever is detected. Frequency changes before putting in and after putting in the measuring object are detected, and based on this, the mass changes are calculated.

Abstract: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.

Abstract: To reduce the voltage required to cause a phase transition from an amorphous phase to a crystalline phase, a phase-change memory device (1) comprises: a first electrode (6); a second electrode (8); and a memory layer (14) provided between the first (6) and second (8) electrodes, wherein the memory layer (14) includes at least a first layer (10) formed from a phase-change material which is stable in either the amorphous phase or the crystalline phase at room temperature, and a second layer (12) formed from a resistive material, and wherein the resistance value of the second layer (12) is smaller than the resistance value of the first layer (10) in the amorphous phase, but is larger than the resistance value of the first layer (10) in the crystalline phase.